Semiwiki on LinkedIn Semiwiki on Facebook Semiwiki on Twitter Register / Log in 
Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/daniel-nenni-on-broken-silicon-mlid-5-13-24.20204/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Daniel Nenni on Broken Silicon / MLID - 5/13/24

X

Xebec

Well-known member
Daniel - great to see/hear you on external podcasts like this:


(I'm still listening but wanted to post here. I'm looking forward to hearing your thoughts here about Intel - Arrow Lake, Financials, etc.. Also curious on your predictions for the impact of High NA prior to 2030)

0:00 Daniel Nenni Introduction, Semiconductor News is Mainstream
5:51 Why did Nvidia move Blackwell to 4nm? Is AMD skipping 3nm?
13:34 Intel Arrow Lake on TSMC 3nm - A mistake?
22:39 Will Intel become “Foundry First”?
29:41 Intel’s Financial Situation – Can they Survive Zen 5?
46:08 Could Nvidia buy Intel? Will AMD start acting like Nvidia?
59:15 Would Nvidia ever leave GPU for more AI profits?
1:20:14 Will AMD start using SAMSUNG? Nvidia behind in chiplet tech?
1:32:45 ARM, RISC-V, Future of Chiplets
 
The host pronounces the world Silicon unlike what every semiconductor professional uses, so I cannot bear to listen to his podcast.
 
Daniel Payne said:
The host pronounces the world Silicon unlike what every semiconductor professional uses, so I cannot bear to listen to his podcast.
Click to expand...
Just hit the right arrow key until Daniel speaks, instant upgrade to 40 years of Si experience ;-)
 
That was fast, it was recorded yesterday. Not my favorite thing to do :oops: and no I don't blink that much.

Xebec said:
Just hit the right arrow key until Daniel speaks, instant upgrade to 40 years of Si experience ;-)
Click to expand...

Not hard to figure out. I got married right after I started my first job in the semiconductor industry and this year is my 40th wedding anniversary.

1715715798839.png
 
Great picture and good interview as always! I remember a very long time ago laughing a little when an architect at Lockheed would introduce himself as having 'decades of experience'.. Different perspective now that I'm older.

..

Who handles the chiplet packaging for current AMD client products? Is it TSMC for Zen 4 (which uses exclusively TSMC chiplets), and Globalfoundries for Zen 3 (which uses a mix of TSMC and GF chiplets?).

Also I take it Samsung will package chips from anyone?

Thanks!
 
Other topic - I’d like to learn more about the discussion about the efficiency of AI in data centers today.. I found Daniel’s comments on Altman’s admission of ChatGPT being horribly inefficient interesting.

I know on the client side, a lot of AI coding/work is performed in Python. John Carmack has likened that to bringing the performance of modern multi-GHz high IPC machines back to the 1-2 MHz (non-pipelined) 8-bit era, because of the # of layers of abstraction required. (OTOH he points out that only a few lines of Python code for AI can do ridiculous amounts of actual work thanks to those layers and libraries).

On the data center side - where does the main opportunity lie for performance improvement? Is it the algorithms themselves that are a largely bloated requiring magnitudes more hardware than it should? Or is it more of a hardware opportunity (improvements in memory tied to logic?). Both, else?
 
You must log in or register to reply here.
Back
Top