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IBM has unveiled a new chip design which it says could enable manufacturers to cram 100 billion transistors on a silicon chip the size of a fingernail.
The current industry-standard size for chips, measured in a the unit of nanometres - a billionth of a metre and the size of a few atoms - is around two nanometres (nm).
But IBM claims its new chip tech is the equivalent of around 0.7nm, which may make it the world's first known chip technology below 1nm.
However, it will be several years before the chip tech could be ready to go into production.
The firm claims in tests, its prototype performed 50% better than its own 2nm chip and was 70% more energy efficient.
Jay Gambetta, director of IBM Research and IBM Fellow, described the NanoStack tech as a "landmark moment" for the future of chips.
"With our new NanoStack architecture, we're not just making smaller transistors, we're reinventing how chips are built to deliver dramatically more power and energy efficiency," he said.
"Compared with the not‑for‑profit structures of IMEC in Belgium and ITRI in Taiwan, IBM STR operates under a for‑profit corporate umbrella and must keep producing leading edge, high visibility breakthroughs to justify its existence and attract new funding sources. "
Surely the point about IBM is that they're great at coming up with radical new technologies, but not necessarily ones that can easily be turned into a real high-yield cost-competitive mass-production process (directly or via licensing)?
This has happened in the the past with foundries who tried to do this and came unstuck (e.g. Samsung? STM?), maybe because IBM don't think hard enough about production/alignment margins -- so long as they get one working lot and can publish a paper about it (and license it?) that's their job done.
Still doesn't mean they didn't do it first (and...