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I agree heat density makes things worse but why do you see BSPD as worse? It reduces impedance and droop which should improve operation at lower voltage. The self heating limits are reachable on front side anyway, so improving the power path should be a good thing for power.
My bet is on going cold, with device materials engineered for low voltage thresholds. I don't see it shrinking devices but it will allow more work done with less power:
https://tanjb.substack.com/p/the-low-energy-frontier
It is pointless to integrate logic on a NAND chip. NAND burns hundreds of pJ to deliver 1 bit, and has very low throughput and long latency. You can deliver a bit across 100M of glass fiber for 500x less energy per bit and 50x less latency.
When you work with silicon you need to build the...
That is the key observation. Channel control is limited by end effects which bottom out at 16nm for fins, 13nm for ribbons, using Si. There are indications that W/Mo S2 2-D materials could go down to 10nm with adequate control but those are not even on roadmap, and who knows if they will solve...
To reform medical, you need to do what Uber did to taxis. Have take not prisoners execs and carpet bomb the government with lawyers to eliminate the obstacles, which are not technical.
It is a $4T market with (benchmarked at GDP fraction relative to better results in high income G20 nations...
Memory foundry .. singing my song. Been advocating for this for years.
I don't think it literally requires random logic integrated on DRAM, or NAND. As the messages above indicate that is improbable, nice research project not really viable for a foundry approach unless someone invents a quite...
Waste sulfuric acid tank, not fuel tank. And who manufactured a relief valve that could explode out sending a man 20ft? This points neither to the union nor TSMC. Start with who made that device and why was it unsafe? It is unlikely that any worker would have the means to have found that fault.
Why would they not? DUV and pitch splitting have been the starting points for fins, gates, and low level metals for a while. It is the cuts where they would switch to EUV. And possibly vias if those are not 193i multiple exposure combined with self-aligned structures, which may beat some EUV...
But the peaks are always the problem, and if you add to the baseline the peaks become more painful, often to different people than cause the problem. Data center contracts generally stipulate they get priority, leaving others to scramble. They are learning to be more flexible on that - for...
Context is everything. Sometimes ideas fail in context, not because the idea could not work in the right context (or era - lots of good things today are similar to things that failed miserably in the past). Tesla tried battery swap for a market that turned out to be happy to charge at home...
Shrink has not completely ended, but let's just postulate 14A is the end of the line for logic, including SRAM. Channel length cannot get any shorter, spacing between devices cannot be narrower, and CFET actually works.
But there are still things that keep changing. DRAM has yet to go true...
SMR will happen first outside of the USA, likely Chinese engineering both in China and in areas of the world where their trade and tech is welcomed. SMR is an ideal format for it to be an exporting industry.
Data center planning is way more sophisticated than us in this forum. I used to work...
Since trip miles > 700 are a large part of the graph the data will not line up exactly to travel time between rests or refuel points. I assume those longer routes would use a two person crew to keep running, so a battery swap would still be a preferred option.
Swapping batteries on a truck make a lot more sense for long haul. And would make lighter tractors fungible for both local and long haul routes.
You could cut the battery pack in half, simplify electricity provisioning at recharge stations (since they would run at a steady rate), and even...
Already in use. More would be nice but if it was easy they already would. Shrinking the dimensions does not make such materials easier.
I wonder if such diverse-circuit tactics will help much for AI chips where mostly they are grinding out low precision tensors and moving data.
Sounds like...
Really challenging to try tricks like negative capacitance ferroelectrics or tunnelling combined with the complex fabrication of ribbon or CFET. These complex shrinks reward conservative devices. Whether the construction is ever mastered well enough to start adding gate trickery - maybe, but...
K change makes no difference, since gate capacitance is set by need to control the field in the gate. The point of high-K was to increase thickness to avoid tunneling while applying the same field to the gate.
GAA shortens the gate, which is nice for CPP reduction, but it adds a 4th side so C...
