Clock Gating Optimization

Clock Gating Optimization
by Bernard Murphy on 09-21-2017 at 7:00 am

You can save a lot of power in a design by gating clocks. For much of the time in a complex multi-function design, many (often most) of the clocks are toggling registers whose input values aren’t changing. Which means that those toggles are changing nothing functionally yet they are still burning power. Why not turn off those clock… Read More