Got FPGA Timing Closure Problems?

Got FPGA Timing Closure Problems?
by Paul McLellan on 02-26-2015 at 7:00 am

I had a meeting with Harn Hua Ng, the CEO of Plunify, a couple of weeks ago. They are an EDA company that I’d never heard of. Partially that is because they only play in the FPGA space, a country I visit less frequently than SoC land. Plus, they are based in Singapore, a country I have only been to a couple of times in my life.

Plunify… Read More