Daniel Payne
Moderator
Signal Integrity with Best-in-Class Transistor-level Accuracy
At the recent HSPICE Special Interest Group (SIG) event held on January 28, 2014, attendees had an opportunity to interact with Synopsys HSPICE R&D personnel as well as representatives from several HSPICE Integrator Program (HIP) partners. If you were unable to attend the 2014 HSPICE SIG event in person, we invite you to view event photos and a video of the technical presentations posted on the Synopsys web site.
Now you have the opportunity to hear what industry leaders from Altera, Cisco, and Micron had to say about using HSPICE for signal integrity with best-in-class transistor-level accuracy in some of today’s most challenging designs:
View the Videolog Now!
At the recent HSPICE Special Interest Group (SIG) event held on January 28, 2014, attendees had an opportunity to interact with Synopsys HSPICE R&D personnel as well as representatives from several HSPICE Integrator Program (HIP) partners. If you were unable to attend the 2014 HSPICE SIG event in person, we invite you to view event photos and a video of the technical presentations posted on the Synopsys web site.
Now you have the opportunity to hear what industry leaders from Altera, Cisco, and Micron had to say about using HSPICE for signal integrity with best-in-class transistor-level accuracy in some of today’s most challenging designs:
- Altera: "Extracting Impulse Response using HSPICE"
- Cisco: "Power Integrity Analysis of 12Gbps SerDes"
- Micron: "SSO Simulation with Power-aware IBIS Models”
- Synopsys: “Verifying Timing Specification of DDR3 Memory Interface”
View the Videolog Now!