The Design & Verification Conference & Exhibition
Is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits.
The focus of this highly technical conference is on the practical usage of specialized design and verification languages such as SystemC, SystemVerilog and e, assertions in SVA or PSL, as well as the use of AMS languages, design automation using IP-XACT and use of general purpose languages C and C++.
This call for abstracts solicits for presentations that are highly technical and reflect real life experiences in using languages, standards, methods and Electronic Design Automation (EDA) tools. Submissions are encouraged in (but not restricted to) the following areas:
TOPIC AREAS:
honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon, based on the quality of both the paper and the presentation.
Please submit your abstract and join DVCon 2015!
Submit your 400-500 word abstract by Thursday, August 28, 2014.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an industry consortium dedicated to the development and standardization of design and verification languages. For more information about Accellera, please visit www.accellera.org. For more information about DVCon, please visit www.dvcon.org. Follow @dvcon on Twitter or to comment, please use #dvcon.
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Is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits.
The focus of this highly technical conference is on the practical usage of specialized design and verification languages such as SystemC, SystemVerilog and e, assertions in SVA or PSL, as well as the use of AMS languages, design automation using IP-XACT and use of general purpose languages C and C++.
This call for abstracts solicits for presentations that are highly technical and reflect real life experiences in using languages, standards, methods and Electronic Design Automation (EDA) tools. Submissions are encouraged in (but not restricted to) the following areas:
TOPIC AREAS:
- System-Level Design
- Verification & Validation
- IP Reuse and Design Automation
- Mixed-Signal Design and Verification
- Lower Power Design and Verification
honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon, based on the quality of both the paper and the presentation.
Please submit your abstract and join DVCon 2015!
Submit your 400-500 word abstract by Thursday, August 28, 2014.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an industry consortium dedicated to the development and standardization of design and verification languages. For more information about Accellera, please visit www.accellera.org. For more information about DVCon, please visit www.dvcon.org. Follow @dvcon on Twitter or to comment, please use #dvcon.
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