user nl
Well-known member
During the last year many discussions on this SemiWiki website centered on the reasons why Intel started struggling versus the success of TSMC.
Many topics were discussed, like the IDM model versus Pure Play Foundry and the role of incompetent management, boards and financial engineering.
I'm not a semi expert and I may have missed quite some discussions about this topic, so perhaps people can share their opinion of another change during the years 2017-2022: the development of chiplets/tiles for leading edge logic.
I'm amazed at how the 7nm and 5 nm nodes of TSMC have evolved into enormous cash cows during the last 2-3 years as TSMC uses an aggressive 5-year depreciation of their tools, so that their gross margins of certain nodes rises to 65-75%?
This Table is what Gemini produced in some detailed discussions about estimated gross margins of TSMC's nodes in 2025 with fixed gross margins for the N7 and mature nodes, to re-produce the overall gross margins of TSMC as reported in each quarter of 2025. I have no insight in this matter, so please correct me if you think some GM's do not make sense.
The strong contribution of some super-high margin nodes (5nm and 7nm) and their role as the producers of many little fish/chiplets in leading edge semi for HPC, AI, mobile, laptops etc seems to suggest that these older nodes will have a much longer lifetime and high-profitable role as huge cash cows for TSMC.
So my question to this community: what may have been the effect of the chiplet-revolution in semi-manufacturing on the success of TSMC?
Many topics were discussed, like the IDM model versus Pure Play Foundry and the role of incompetent management, boards and financial engineering.
I'm not a semi expert and I may have missed quite some discussions about this topic, so perhaps people can share their opinion of another change during the years 2017-2022: the development of chiplets/tiles for leading edge logic.
I'm amazed at how the 7nm and 5 nm nodes of TSMC have evolved into enormous cash cows during the last 2-3 years as TSMC uses an aggressive 5-year depreciation of their tools, so that their gross margins of certain nodes rises to 65-75%?
This Table is what Gemini produced in some detailed discussions about estimated gross margins of TSMC's nodes in 2025 with fixed gross margins for the N7 and mature nodes, to re-produce the overall gross margins of TSMC as reported in each quarter of 2025. I have no insight in this matter, so please correct me if you think some GM's do not make sense.
The strong contribution of some super-high margin nodes (5nm and 7nm) and their role as the producers of many little fish/chiplets in leading edge semi for HPC, AI, mobile, laptops etc seems to suggest that these older nodes will have a much longer lifetime and high-profitable role as huge cash cows for TSMC.
So my question to this community: what may have been the effect of the chiplet-revolution in semi-manufacturing on the success of TSMC?