IP - SoC 2012 will be the 21th edition of the working conference on hot topics in the design world, focusing for the past years on IP-based SoC design and held in the renowned Silicon Valley of the French Alps.
View attachment 4882
This event is the only worldwide event fully dedicated to IP (Intellectual Property) in electronic systems. The satisfaction level of the attendees is impressive due to well focused, high level panels, sessions and seminars. Over the year IPs have become Subsystems or Platforms and thus as a natural applicative extension IP-SoC will definitively include a strong Embedded Systems track addressing a continuous technical spectrum from IP to SoC to Embedded System.
* Deadline for Paper Submission: September 22, 2012
Submit your paper now !!!!
* Early Bird Registration Open Now ...
Register Today & Save!
Areas of interest: IP Best practice
• Business models
• IP Exchange, reuse practice and design for reuse
• IP standards & reuse
• Collaborative IP based design
Design
• DFM and process variability in IP design
• IP / SoC physical implementation
• IP design and IP packaging for Integration
• IP and system configurability
• IP platform and Network on Chip
Quality and verification
• IP / SoC verification and prototyping
• IP / SoC quality assurance
Architecture and System
• IP / SOC transaction level modelling
• Multi-processor platforms
• HW/SW integration
• System-level analysis
• System-level virtual prototyping
• NoC-based Architecture
Embedded Software
• Software requirements (timeliness, reactivity)
• Computational Models
• Compilation and code generation
Real-Time and Fault Tolerant Systems
• Real-time or Embedded Computing Platforms
• Real-Time resource management and Scheduling
• Real-time Operating system
• Support for QoS
• Real-time system modelling and analysis
• Energy-aware real-time systems
New topics are welcome -- New topics are welcome -- please contact us at ipsoc2012@design-reuse.com
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View attachment 4882
This event is the only worldwide event fully dedicated to IP (Intellectual Property) in electronic systems. The satisfaction level of the attendees is impressive due to well focused, high level panels, sessions and seminars. Over the year IPs have become Subsystems or Platforms and thus as a natural applicative extension IP-SoC will definitively include a strong Embedded Systems track addressing a continuous technical spectrum from IP to SoC to Embedded System.
* Deadline for Paper Submission: September 22, 2012
Submit your paper now !!!!
* Early Bird Registration Open Now ...
Register Today & Save!
- "Power is now a Software Issue" by Colin Walls, Mentor Graphics
- "Mobile Device Software Development" by Nithya Ruff, Synopsys
- "Specifying the Reliability of Complex IP Components" by Adrian Evans, iRoC Technologies, IEEE RIIF (Reliability Information Interchange Format) Working Group
- "Parallel Computing" Seminar by Huy-Nam Nguyen, BULL
- "Functional safety for integrated circuits and IPs" by Riccardo Mariani, Yogitech and Karl Greb, Texas Instrument
- The well recognized Panel track on hot topics. These panels will address both IP and Embedded Systems challenges today
- Technical papers addressing the issues in the IP-based system design and in the Embedded System arenas
- Visionary scientific seminars on key topics organized by gurus in the field ,including invited state of the art academic presentations
- Exhibitor track offering sponsored speaking opportunities for Companies willing to communicate their technical capabilities in greater depth ideas through technical presentations in one hour or in half-day workshops
- Deadline for submission of paper summary: September 22, 2012
- Notification of acceptance: October 13, 2012
- Final version of the manuscript: November 3, 2012
- Working conference: December 4-5, 2012
Areas of interest: IP Best practice
• Business models
• IP Exchange, reuse practice and design for reuse
• IP standards & reuse
• Collaborative IP based design
Design
• DFM and process variability in IP design
• IP / SoC physical implementation
• IP design and IP packaging for Integration
• IP and system configurability
• IP platform and Network on Chip
Quality and verification
• IP / SoC verification and prototyping
• IP / SoC quality assurance
Architecture and System
• IP / SOC transaction level modelling
• Multi-processor platforms
• HW/SW integration
• System-level analysis
• System-level virtual prototyping
• NoC-based Architecture
Embedded Software
• Software requirements (timeliness, reactivity)
• Computational Models
• Compilation and code generation
Real-Time and Fault Tolerant Systems
• Real-time or Embedded Computing Platforms
• Real-Time resource management and Scheduling
• Real-time Operating system
• Support for QoS
• Real-time system modelling and analysis
• Energy-aware real-time systems
New topics are welcome -- New topics are welcome -- please contact us at ipsoc2012@design-reuse.com
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