Intel Foundry is way behind TSMC, but the goal is #2 by 2030

[NY_Sam2]

Once behind, everything becomes complicated/difficult. Then, need to compromise and be pragmatic/realistic.

If Customers do not commit, it is not because Intel Foundry PDK specs are not as good as TSMC, but because cannot be assured if Intel Foundry can deliver or not.

Intel Foundry, how about increasing BEOL M0 pitch from 32nm to 34nm for 18A & 18A-P? How about (not 25-26nm but) 28nm for 14A? Plan B if EUV High NA0.55 does not work?

In 2020, TSMC showed M0 18nm. When for HVM, 2030 (or never)?

At 2022-Dec-IEDM, TSMC presented CPP 45nm for N3B/N3E. In 2023-May, revealed 48nm for N3E. Link = https://fuse.wikichip.org/news/7375/tsmc-n3-and-challenges-ahead/

At 2022-Dec-IEDM, TSMC presented M0 23nm with "an innovative liner". In 2024-Jul, Applied announced RuCo liner, not needed for Intel? Link = https://ir.appliedmaterials.com/new...s-unveils-chip-wiring-innovations-more-energy

At 2025-Jun-VLSI, Intel showed same CPP 50nm from Intel 3 to Intel 18A. Like this being pragmatic/realistic.

Why backside power for Intel Foundry? Since not competitive against TSMC for Cell Height without it! Since for M0, Intel 18A 32nm vs TSMC N3B/N3E 23nm.

Link = https://semiwiki.com/semiconductor-...ghts-of-the-tsmc-technology-symposium-part-1/

 

[Daniel Nenni]

Intel being the second largest foundry should not be a problem once they shift all Intel products back to Intel manufacturing. Samsung Foundry counts internal products as revenue so this is business as usual for IDM foundries.

Intel or Samsung catching up to TSMC is years away if ever. The pure-play foundry business model is just too strong.

Intel does have a great packaging story (BSPD). Samsung not so much. Maybe Samsung should use Intel Foundry and just focus on memory? If Samsung 2nm fails like Samsung 3nm will they have a choice? I do not see Samsung partnering with TSMC.