You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
4F2 comes in after 1d, but only lasts three generations. Since resources are being spent on 1d, 4F2, of course the 3D DRAM progress would be slowed down, but that only applies to the Samsung and SK hynix and maybe Micron. 3D DRAM is a long-term solution for the tier-1 guys but probably the big...
This would be true for Samsung, SK hynix, etc. but it might be very different perspective for CXMT for example. CXMT is likely to skip 2D nodes going forward.
CXMT first discussed their 3D DRAM at IMW 2023: https://ieeexplore.ieee.org/document/10145931
Abstract:
Continuous shrinking of dynamic random access memory ⟨DRAM) feature size will inevitably hit unsurmountable barriers, such as sub-10 nm patterning issues, ultra-high aspect ratio (HAR)...
From the abstract:
Buried multilayer (ML) defects in EUV masks continue to pose a significant challenge to imaging fidelity and yield in 0.33 NA EUV lithography.
However, it's only going to get worse with High-NA, which collects more light from smaller defects...
The 3D DRAM in principle reduces the rowhammer risk with larger separations between word lines, but the JEDEC standard of 32 ms may be locked in at that time. The refresh rate is not that high a priority for scaling.
The scaling will be most strongly impacted by distances within the DRAM cell itself. The VCT 4F2 architecture is motivated by the bit line approaching the capacitor active area contact too closely, while the 3D DRAM architecture comes from the capacitor itself becoming too thin.
For DDR5/LPDDR5, refresh rate doubled from every 64 ms to every 32 ms. I'm pretty sure rowhammer had a lot to do with it. So this basically affects 1b onwards, although the issues started as early as 2x nm I'm sure.
Author: Su Ziyun | Publication Date: April 16, 2026, 12:13 PM
According to Wccftech, Qualcomm is collaborating with Chinese memory manufacturers Changxin Memory and GigaDevice to develop a standalone neural processing unit (NPU) that incorporates 3D DRAM, attempting to overcome the current...
Regarding new foundry customers:
Timothy Arcuri: Thanks a lot. Lip Bu, I wanted to ask about the evolution of your foundry model. You are of course pursuing typical foundry customers, but it seems like TeraFab is a little bit of a different deal and maybe even like a process licensing...
During the call, DZ said,
"Intel Foundry operating loss in Q1 was $2.4 billion, improved $72 million quarter-over-quarter as better yields across Intel 4, Intel 3, and 18A drove higher gross margins. This was mostly offset by increased operating expenses associated with an intentional step-up...
This article was written shortly before Intel's Q1 Earnings Call, but it still gives helpful perspectives on what Intel's future holds. Here are some excerpts:
On April 8th, SemiAnalysis' chief analyst pointed out that CPUs are facing a very severe production shortage. Currently, the ratio of...
Yes, I agree, I probably saw the same figures. So I think this paper is not about Z-Angle Memory. HB3DM is just something else they are trying. ZAM might still be under development. It is not mentioned in the abstract at all. TechPowerUp jumped the conclusion.
This is from the VLSI Technology 2026 symposium highlights recently released: https://www.vlsisymposium.org/wp-content/uploads/2026/04/2026-VLSI-Technical-Tipsheet-REVISED-FINAL-4.25.26-1-1.pdf
PSMC is a DRAM foundry: https://www.powerchip.com/en-global/services/foundry-services
I think Intel is just responsible for the stacking part. The DRAM is from PSMC apparently. The logic base die, if it had been made on Intel 18A or Intel 3, I'm sure that would have been called out.
ASML knows it does not have much leverage with High-NA. They said so ("not prime time for High NA today") in their last quarterly earnings call.
Along with Lam Research, they presented stochastic defectivity data with the latest, greatest dry resist this year, and it's still a big deal...
Published: April 22, 2026 | Source: Digitimes | Author: Mark Campbell
Industry hopes that Intel 18A can alleviate CPU shortages
The world isn’t just facing a memory shortage; it’s also facing a CPU shortage. Intel is currently capacity-limited, meaning it cannot make enough CPUs to meet demand...
