Intelligent tools for complex low power verification

Intelligent tools for complex low power verification
by Pawan Fangaria on 04-02-2013 at 8:05 pm

The burgeoning need of high density of electronic content on a single chip, thereby necessitating critical PPA (Power, Performance, Area) optimization, has pushed the technology node below 0.1 micron where static power becomes equally relevant as dynamic power. Moreover, multiple power rails run through the circuit at different… Read More