Data Science and Practical AI for Engineers Series 2: Modeling and Evaluation

Data Science and Practical AI for Engineers Series 2: Modeling and Evaluation
by Admin on 03-29-2022 at 3:13 pm

3-Part Webinar Series — That Covers Everything You Need to Get Started with Data Science at Scale

Are you an engineer looking to use data science in your day-to-day role?

We’ve brought together some of the brightest minds in this field to show you how it’s done.

As part of this series, we’ll cover: 

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Data Science and Practical AI for Engineers Series: Data Collection, Preparation, and Understanding

Data Science and Practical AI for Engineers Series: Data Collection, Preparation, and Understanding
by Admin on 03-29-2022 at 3:11 pm

Are you an engineer looking to use data science in your day-to-day role?

We’ve brought together some of the brightest minds in this field to show you how it’s done.

As part of this series, we’ll cover: 

Read More

Synopsys Parasitic Extraction – Interconnect 2022

Synopsys Parasitic Extraction – Interconnect 2022
by Admin on 03-25-2022 at 1:16 pm

April 12, 2022
15:30 PM – 18:00 PM UTC +1
Virtual Experience

Why Attend?

Join us at the upcoming SPEX-I 2022 Workshops to learn about the latest features and flows to address signoff parasitic extraction challenges for advanced digital SoC designs or complex custom designs using Synopsys’ StarRC™ solution. In this workshop,… Read More


Formal Verification for Non-Specialists

Formal Verification for Non-Specialists
by Admin on 03-25-2022 at 1:14 pm

Wed, Apr 6, 2022 10:00 AM – 11:00 AM PDT
Is formal verification ready for general use or do you need a PhD to use it? Larger companies continue to recruit formal PhDs into their verification teams while other less-well-qualified engineers seem reluctant to go beyond simplified formal “apps”. So, what is the truth
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Overcoming System-Level 3D-IC Electrical and Thermal Challenges

Overcoming System-Level 3D-IC Electrical and Thermal Challenges
by Admin on 03-25-2022 at 1:13 pm

Overview

Electronics products with 3D-ICs face growing system challenges related to signal, power, and thermal integrity. Design density can lead to performance issues caused by heat, crosstalk, and power noise.

Addressing these concerns through simulation during system planning and continuing through signoff will accelerate… Read More


Webinar: Imperas RISC-V simulation technology with eSol Trinity and NSITEXE

Webinar: Imperas RISC-V simulation technology with eSol Trinity and NSITEXE
by Admin on 03-25-2022 at 12:52 pm

Imperas RISC-V reference models highlighted for software development and RISC-V processor verification, including an example project with NSITEXE.

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced with eSol Trinity the webinar event on RISC-V reference models and simulation technology… Read More


Overcoming System-Level 3D-IC Electrical and Thermal Challenges

Overcoming System-Level 3D-IC Electrical and Thermal Challenges
by Admin on 03-03-2022 at 2:13 pm

Overview

Electronics products with 3D-ICs face growing system challenges related to signal, power, and thermal integrity. Design density can lead to performance issues caused by heat, crosstalk, and power noise.

Addressing these concerns through simulation during system planning and continuing through signoff will accelerate… Read More


Synopsys CAD Navigation Users Group: Avalon™ & SysNav™

Synopsys CAD Navigation Users Group: Avalon™ & SysNav™
by Admin on 03-03-2022 at 2:02 pm

Join industry leaders from Intel, Qualcomm, onsemi and Synopsys in the 4th annual, 2nd virtual CAD Navigation (CADNav) User’s Group Meeting as they share the latest innovations, methodologies and experiences using Synopsys CADNav tools, Avalon™ and SysNav™.

You’ll hear about successful deployment of Synopsys CADNAV tools… Read More


3D-IC Chip-Centric Power and Thermal Integrity with High-Performance Hiearchical Analysis

3D-IC Chip-Centric Power and Thermal Integrity with High-Performance Hiearchical Analysis
by Admin on 03-03-2022 at 2:00 pm

Overview

A 3D-IC includes the package, interposer, multiple chiplets, through-silicon vias (TSVs), and through-dielectric vias (TDVs).  Supplying power to the chiplets and dissipating heat through these various components poses a major power integrity (PI) and thermal integrity challenge. Early analysis also is extremely… Read More