800x100 static WP 3
WP_Term Object
(
    [term_id] => 178
    [name] => IP
    [slug] => ip
    [term_group] => 0
    [term_taxonomy_id] => 178
    [taxonomy] => category
    [description] => Semiconductor Intellectual Property
    [parent] => 0
    [count] => 1672
    [filter] => raw
    [cat_ID] => 178
    [category_count] => 1672
    [category_description] => Semiconductor Intellectual Property
    [cat_name] => IP
    [category_nicename] => ip
    [category_parent] => 0
)

2nd International RRAM Workshop at Stanford

2nd International RRAM Workshop at Stanford
by Ed McKernan on 10-24-2012 at 5:00 pm

 The 2nd International Workshop on Resistive RAM. The workshop was the second installment of an annual series organized by Stanford University and the Belgian research institute Imec. Like most RRAM workshops, this year’s event featured talks focusing on the physics of RRAM devices and their underlying switching mechanism(s). However, roughly equal attention was paid to design and architecture aspects of RRAM technology and to potential RRAM applications other than its use as a NAND replacement, such as a talk on low power programmable logic from LEAP/NEC. This seemed to reflect a general feeling that the R&D efforts on RRAM of the past decade may soon yield a usable technology, or perhaps even several technologies from different companies. The workshop also gave particular emphasis to the question of what the requirements are for a selector device for RRAM, and how close various selector technologies are to meeting these requirements. For more info, follow the link ReRAM-Forum.com

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.