OpenCL brings algorithm development into a unified programming model regardless of the core, working across CPUs, GPUs, DSPs, and even FPGAs. Intel has been pushing OpenCL programming for some time, particularly at the high end with “Knights Landing” processors. Where other vendors are focused on straight-up C high-level synthesis for FPGAs, Intel is taking Altera technology deeper into OpenCL.
Using OpenCL, a developer can write an algorithm once, emulate it on a PC, then choose what hardware to run it on – or partition it across several different types of hardware depending on cost and packaging. Intel’s FPGA SDK for OpenCL helps abstract out FPGA complexity for hardware acceleration. Their compiler can perform over 300 optimizations, then synthesize the FPGA in a single step.
Several different hosts are supported, including ARM Cortex-A9 cores typical of SoCs, IBM POWER Series processors, and X86 CPUs. The solution can be scaled across multiple FPGAs, which makes it ideal for the FPGA-based prototyping scenario. Instead of taking overt partitioning steps and spreading out RTL across several FPGAs, OpenCL code distributes seamlessly across FPGA devices. This is a huge advantage for HPC teams who want to concentrate on software, not hardware, and especially not the nuances of FPGA programming.
In fact, OpenCL could be one of the key differentiators between the Intel/Altera combination and the ARM/Xilinx ecosystem. There are OpenCL ports on lots of platforms since it is an open standard, but Intel has gone all in on optimization for OpenCL across the board including its FPGA offering. Combining the benefits of an OpenCL development flow with the power of an Altera Arria 10 FPGA brings a bunch of algorithm acceleration possibilities.
S2C has solved the problem of how to get many FPGAs interconnected in a single prototyping platform. With their new Arria 10 Prodigy FPGA Prototyping Logic Module, users can have anywhere from a single Arria 10 1150GX FPGA to a scaled-up system with 16 FPGAs in the Cloud Cube chassis. As the name implies, a single Arria 10 logic module has 1150K logic elements along with a full suite of programmable I/O including 48 transceivers running at up to 16Gbps, and 576 high performance I/Os. It’s an incredible leap, not only for those interested in working in the Intel/Altera environment, but for those working on OpenCL.
You can read more about the Intel FPGA SDK for OpenCL, and download a copy, here:
Intel FPGA SDK for OpenCL
For more information on the S2C Arria 10 Prodigy FPGA Prototyping Logic Module, here’s the full S2C press release:
The thing about FPGA-based prototyping is it is becoming less about the FPGA and more about the software running on the platform. While the entire S2C prototyping portfolio including expansion daughter cards, configuration, and debug capability comes to bear, the real news here is how OpenCL speeds up the software development process. The shape of HPC is changing from big, expensive iron to reconfigurable, accelerated computing with FPGAs underneath the hood.