hip webinar automating integration workflow 800x100 (1)

Physical Design Engineer

Physical Design Engineer
by Admin on 04-08-2022 at 11:18 am

  • Full Time
  • San Jose, CA
  • Applications have closed

POSITION SUMMARY

  • 10+ year experience PD engineer with recent block level RTL to GDS experience (meaning: synthesis, place and route as well as physical verification).
  • 100% hands on experience
  • Full chip experience would be a big plus.
  • Need to have strong fundamentals as well as being familiar with every aspect of the flow.
  • Strongly preferred, if available, two years-worth of Cadence flow experience (Genus/Innovus/Tempus) preferably within the past 4 years.
  • LEC/Conformal-LP/Conformal-ECO also would be a big plus.
    Education: Bachelor’s Degree in Engineering
Share this post via: