HW Verification Engineer – HLS

Codasip was founded on a simple belief – we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that made design simpler, faster, and less expensive. The company was created in 2014 with the mission of democratizing processor design. Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM.

The High Level Synthesis team (led by Honza Bartůšek) is working on our EDA tool, Codasip Studio, which provides help to our customers and our IP engineers with RISC-V processors design.

Honza´s team is primarily focused on:

• The tool, that automatically generates microprocessor hardware representation from the definition in Codal language
• RTL design and verification of generic microprocessor components (cache, buses, on-chip debugger, …)
• Codasip Studio tool orchestration framework (written in Python)

YOUR CORE RESPONSIBILITIES WILL BE:

• Participate in the development of processor L1 caches and other generic parts of the microprocessors
• Create and maintain verification environment, automated tests, and checkers
• Design generic solutions and process automation
• Hunt for bugs, build up the testing scenarios, verification plans to make sure that the bugs won’t happen again
• Come up with and realize your own ideas on how to improve, automate or upgrade our technologies on an even higher level (you will definitely get our support)

YOU SHOULD HAVE:

• Experience in Hardware verification (VHDL/Verilog simulation, UVM or formal)
• Knowledge of versioning tools (Git preferred)
• Software writing skills (Python preferred)
• Communicative English

NICE-TO-HAVES:

• Practical usage of  Linux
• Experience in OOP
• Knowledge of AMBA protocols

This position is based in our R&D center in Brno or Prague.