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eFPGA Verification Engineer

eFPGA Verification Engineer
by Admin on 05-26-2022 at 4:32 pm

Website Flex Logix

Responsibilities

Verification Engineer involved in functional verification and customer delivery of the EFLX (embedded FPGA) cores in different process nodes (most recent designs in 14/16nm, moving to 7nm and beyond). Responsible for all aspects of verification and emulation including:

  • Work with Architecture, RTL and Physical Design Engineers.
  • Setup of industry standard Verification IP flow.
  • Point of contact for verification related customer issues and deliverables.
  • Development of verification testbenches and debug for EFLX IP.
  • Functional and GLS verification using Verilog simulator, regressions and coverage closure.
  • JTAG/DFT/ATPG verification and pattern generation.
  • Development of emulation testbenches using standard emulation toolsets (Mentor Graphics’ Veloce, Cadence’s Palladium, etc.).
  • Development of testbench and debug for silicon validation, post-silicon bring-up and checkout; Linux-based validation using C++/Python.
  • Development of coverage plans and metrics, drive coverage activities and test writing.
  • UPF simulation and debug.
  • Post-Silicon pattern generation and testing using system bench setup to validate EFLX core.
  • Power/Performance benchmarking and debug.

Required Experience

  • Must have hands-on experience in VIP setup/integration of tools from Synopsys, Avery, SmartDV or similar.
  • Must have hands-on experience with UVM/OVM.
  • Must have hands-on experience in developing verification plans for SoC or ASIC architectures.
  • Must have hands-on, test-writing experience with SIMD, RISCV or ARM ISA, AMBA, JTAG/DFT architectures.
  • Must have hands-on functional coverage analysis and assertion implementation experience.
  • Must have hands-on experience with standard functional simulators such as NCSIM or Questa.
  • BSEE/MSEE with at least 5 years of relevant industry experience.

Preferred experience 

  • FPGA debug exposure.
  • LPDDR4X/5, PCIe5/USB4 architecture.
  • Emulation flow development in Mentor Graphics’ Veloce or equivalent emulation hardware.
  • Exposure to Formal Verification techniques.
  • Worked with and directed external contractors.

Must be passionate about being part of an aggressive, venture-backed startup team that is changing chip architecture. Must be entrepreneurial, innovative problem solver and willing to work hard. Must live in Silicon Valley or Austin area and have US citizenship or permanent residency (“green card”), or holding a current H1-B visa.

Flex Logix recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

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