DFT Engineer
Website Alphawave Semi
What You’ll Do
- Develop and implement DFT architecture and infrastructure
- Simulate with back-annotated timing debugging
- inserting DFT structures at the RTL and gate level, and verifying correct operation of those structures from RTL to back-annotated gates
What You’ll Need
- Bachelor’s degree in Engineering Science, Electrical and Computer Engineering or Computer Science is at a minimum
- 5+ years of experience is required
- Understanding of TCL a must
- Basic understanding of UNIX and UNIX scripting languages (shell, awk, perl)
- VCS/NCSim or Verilog simulators
- DesignCompiler / DFT Compiler / Genus / TestEncounter / TestKompress [ any of these ]
- Compressed Scan Debug [ SNPS or Tessent ] [ any of these ]
- OCC [ Tessent / SNPS ] [any of these ]
- MemoryBIST [ Tessent or SNPS STAR ]
- Understanding of modern DFT techniques, OCC, set/reset testing and best practices.
- Transition and SA ATPG, with understanding of defect models of each, and defects affecting N5 or lower nodes
- Understanding of general high-speed, small -tech node design techniques
- Understanding of retargeting, core wrapping flows, and IEEE 1149.1/1149.6 and P1500
It would be great if you had
- Understanding and experience with ATE debug
About You
- Excellent communication skills
- Able to listen to and appreciate ideas and opinions that differ from yours
- Extremely detail oriented
- Superb analytical and problem-solving skills
- Drives for consistency
- Takes personal pride in high standard of outputs
- Self-motivated and self-managing
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