AI Inference SoC and RTL Logic Design Engineer

Flex Logix is seeking Inference SoC (System on Chip) and Logic Design Engineers to join our team developing the SoC RTL that controls our Inference SoCs and interfaces; and the “SoftLogic” RTL that controls the execution of the compute kernels of our neural network model operators.

Responsibilities

• Be part of our exciting team developing responsible for designing the RTL that runs on eFPGA (embedded FPGA) and is used to control the execution of neural network layers (we call this SoftLogic).
• The candidate must be able to micro-architect and deliver eFPGA RTL for the Reconfigurable Tensor Processor to implement neural network operators.
• The candidate must provide technical leadership in solving new and challenging problems that require coordination with other hardware, software and system engineering teams.
• Preferred candidate would be able to work in every stage of silicon development: specification, coding, verification, place and route, timing closure and post-silicon validation for SoC to deliver micro-architecture and RTL for SoC and softlogic blocks.

Requirements

• Must have
  • Extensive experience coding Verilog or System Verilog RTL.
  • Demonstrated experience with very high-speed, pipelined designs (>3 GHz).
  • Proven track record on delivering micro-architecture and RTL code that works on Silicon and meets timing for high-speed designs.
  • Experience fixing critical paths in the design using front-end RTL techniques for FPGA synthesis/place and route tool chain.
  • Experience running Lint, CDC, and other static quality checks.
  • Experience with starting designs from scratch.
  • BS/MSEE/CE/CS with a minimum of 5 years of experience designing functional units or SOC RTL.

Preferred skills:

• Experience interfacing with internal and 3rd party IP suppliers.
• Experience scripting in Python or Perl.
• Familiarity with C or C++ coding.
• Familiarity with memory architecture in SoCs.
• Familiarity with DDR and PCIe standards.
• Familiarity with NoC or AXI Crossbars.
• Knowledge of computer architecture, especially in systolic arrays.
• Experience with FPGA design and emulation.
• Experience with FPGA and ASIC EDA tools.

Must be passionate about being part of an aggressive, venture-backed startup team that is changing chip architecture. Must be entrepreneurial, innovative problem solver and willing to work hard. Must live in Silicon Valley or Austin area and have US citizenship or permanent residency (“green card”), or holding a current H1-B visa.

Flex Logix recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.