Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/synopsys%E2%80%99-q2-beat-shows-its-ai-opportunity-is-expanding.25773/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/EmailDomainReplace] => 1000010
            [SemiWiki/HtmlMailer] => 1000200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2031270
            [XFI] => 1060170
        )

    [wordpress] => /var/www/html
)

Synopsys’ Q2 Beat Shows Its AI Opportunity Is Expanding

Daniel Nenni

Founder
Staff member

Synopsys Q2 Beat Drives AI Design.jpg

Synopsys’ fiscal second-quarter 2026 results were more than a routine earnings beat. They offered evidence that the company is becoming increasingly important to the entire artificial-intelligence computing stack—while making tangible progress integrating Ansys and converting that strategic expansion into stronger financial expectations.

For the quarter ended April 30, Synopsys generated revenue of $2.276 billion, up 42% from $1.604 billion a year earlier and above management’s previous guidance. Non-GAAP earnings reached $3.35 per diluted share, also exceeding guidance, while non-GAAP net income rose to $643.7 million from $572.7 million. The headline growth rate was boosted substantially by the Ansys acquisition, so it should not be interpreted as purely organic expansion. Nevertheless, management described strength across the business rather than dependence on a single product or customer category. Synopsys’ Q2 results

The outlook was arguably more important than the quarter itself. Synopsys raised its full-year revenue target to a midpoint of $9.665 billion, compared with $9.610 billion previously. Management attributed $35 million of the increase to better underlying business performance and $60 million to an Ansys channel-accounting effect, partly offset by a $40 million reduction associated with the planned divestiture of its Processor IP Solutions business. It also increased the midpoint of non-GAAP earnings guidance to $14.76 per share and projected approximately $2 billion in free cash flow.

That combination matters. A revenue beat can result from timing, especially at a software company whose mix includes upfront product revenue. But higher revenue, improved margin expectations, increased earnings guidance and a stronger cash-flow target together indicate that the upside is reaching more than the top line. Synopsys appears to be extracting efficiencies from the combined organization sooner than investors may have expected, with management citing cost discipline and accelerating Ansys synergies.

The strategic backdrop is equally significant. AI is increasing the number, variety and complexity of chips being designed. Hyperscalers are developing custom accelerators, semiconductor companies are pursuing increasingly specialized architectures, and advanced systems require extensive verification before manufacturing. These trends raise the cost of design failure and increase the value of electronic-design-automation tools, semiconductor intellectual property and simulation software.

Synopsys occupies a critical position in that workflow. Its traditional tools help engineers design and verify chips, while Ansys extends its reach into areas such as thermal behavior, structural integrity, electromagnetics and broader system-level simulation. Combining those capabilities supports Synopsys’ “silicon to systems” strategy: instead of serving only chip designers, the company can help customers model how semiconductors behave inside complete products.

That expansion could deepen customer relationships and create cross-selling opportunities. It may also strengthen Synopsys’ competitive position because customers increasingly need connected workflows rather than isolated engineering tools. As designs become more complex, changing vendors or stitching together incompatible systems can introduce cost, delay and risk. A broader integrated platform could therefore improve both customer retention and pricing power.

There are reasons for caution. GAAP earnings fell sharply to $0.09 per share, largely reflecting acquisition-related amortization, stock compensation and restructuring costs. The substantial gap between GAAP and adjusted earnings deserves attention, particularly while integration spending remains elevated. Export controls and Entity List restrictions also remain material uncertainties; Synopsys explicitly based its guidance on no further changes to those rules.

Even with those caveats, the Q2 beat matters because it reinforces the central investment thesis. Synopsys is not merely benefiting from a temporary surge in AI chip spending. It supplies the tools needed to manage the enduring engineering complexity that AI creates. If Ansys integration continues to expand margins and cash generation, Synopsys could emerge as a broader, more indispensable—and more profitable—engineering platform.

 

View attachment 5122

Synopsys’ fiscal second-quarter 2026 results were more than a routine earnings beat. They offered evidence that the company is becoming increasingly important to the entire artificial-intelligence computing stack—while making tangible progress integrating Ansys and converting that strategic expansion into stronger financial expectations.

For the quarter ended April 30, Synopsys generated revenue of $2.276 billion, up 42% from $1.604 billion a year earlier and above management’s previous guidance. Non-GAAP earnings reached $3.35 per diluted share, also exceeding guidance, while non-GAAP net income rose to $643.7 million from $572.7 million. The headline growth rate was boosted substantially by the Ansys acquisition, so it should not be interpreted as purely organic expansion. Nevertheless, management described strength across the business rather than dependence on a single product or customer category. Synopsys’ Q2 results

The outlook was arguably more important than the quarter itself. Synopsys raised its full-year revenue target to a midpoint of $9.665 billion, compared with $9.610 billion previously. Management attributed $35 million of the increase to better underlying business performance and $60 million to an Ansys channel-accounting effect, partly offset by a $40 million reduction associated with the planned divestiture of its Processor IP Solutions business. It also increased the midpoint of non-GAAP earnings guidance to $14.76 per share and projected approximately $2 billion in free cash flow.

That combination matters. A revenue beat can result from timing, especially at a software company whose mix includes upfront product revenue. But higher revenue, improved margin expectations, increased earnings guidance and a stronger cash-flow target together indicate that the upside is reaching more than the top line. Synopsys appears to be extracting efficiencies from the combined organization sooner than investors may have expected, with management citing cost discipline and accelerating Ansys synergies.

The strategic backdrop is equally significant. AI is increasing the number, variety and complexity of chips being designed. Hyperscalers are developing custom accelerators, semiconductor companies are pursuing increasingly specialized architectures, and advanced systems require extensive verification before manufacturing. These trends raise the cost of design failure and increase the value of electronic-design-automation tools, semiconductor intellectual property and simulation software.

Synopsys occupies a critical position in that workflow. Its traditional tools help engineers design and verify chips, while Ansys extends its reach into areas such as thermal behavior, structural integrity, electromagnetics and broader system-level simulation. Combining those capabilities supports Synopsys’ “silicon to systems” strategy: instead of serving only chip designers, the company can help customers model how semiconductors behave inside complete products.

That expansion could deepen customer relationships and create cross-selling opportunities. It may also strengthen Synopsys’ competitive position because customers increasingly need connected workflows rather than isolated engineering tools. As designs become more complex, changing vendors or stitching together incompatible systems can introduce cost, delay and risk. A broader integrated platform could therefore improve both customer retention and pricing power.

There are reasons for caution. GAAP earnings fell sharply to $0.09 per share, largely reflecting acquisition-related amortization, stock compensation and restructuring costs. The substantial gap between GAAP and adjusted earnings deserves attention, particularly while integration spending remains elevated. Export controls and Entity List restrictions also remain material uncertainties; Synopsys explicitly based its guidance on no further changes to those rules.

Even with those caveats, the Q2 beat matters because it reinforces the central investment thesis. Synopsys is not merely benefiting from a temporary surge in AI chip spending. It supplies the tools needed to manage the enduring engineering complexity that AI creates. If Ansys integration continues to expand margins and cash generation, Synopsys could emerge as a broader, more indispensable—and more profitable—engineering platform.

glad to see stock up 10% with good earnings call, unlike previous calls where beat performance results in stock drop.

Synopsys structural issue still remains, with cadence catching up on market share on core EDA, minues all Ansys system part. Their IP business growth is rebounding after a few quarter drop, hopefully hyperscaler volume ramp up will continue to be the tailwind
 
glad to see stock up 10% with good earnings call, unlike previous calls where beat performance results in stock drop.

Synopsys structural issue still remains, with cadence catching up on market share on core EDA, minues all Ansys system part. Their IP business growth is rebounding after a few quarter drop, hopefully hyperscaler volume ramp up will continue to be the tailwind

I hear Cadence is catching up on market share but I do not see it. Do you have a reference? Everywhere I go I see Synopsys tools. Certainly Virtuoso is a lock and Cadence has a big emulation story. I'm just not seeing it in the rest of the flow. The Synopsys Ansys acquisition was brilliant. Cadence actually started the acquisition talks with Ansys but Synopsys went over the top big time. Synopsys is also draining top talent from Siemens:


On the IP side, Synopsys is a monster. We just finished our Interface and Design IP reports and Synopsys is getting even stronger.


So where are the numbers showing Cadence beating Synopsys in the flow?

Bottom line: Sassine is a new type of CEO bringing EDA competition to a whole new level, absolutely.

Sassine Gru.jpg
 
I hear Cadence is catching up on market share but I do not see it. Do you have a reference? Everywhere I go I see Synopsys tools. Certainly Virtuoso is a lock and Cadence has a big emulation story. I'm just not seeing it in the rest of the flow. The Synopsys Ansys acquisition was brilliant. Cadence actually started the acquisition talks with Ansys but Synopsys went over the top big time. Synopsys is also draining top talent from Siemens:


On the IP side, Synopsys is a monster. We just finished our Interface and Design IP reports and Synopsys is getting even stronger.


So where are the numbers showing Cadence beating Synopsys in the flow?

Bottom line: Sassine is a new type of CEO bringing EDA competition to a whole new level, absolutely.
Jay Vleeschhouwer at DAC last month did his usual EDA industry landscape talk, and i believe for the 1st time he mentioned candence core EDA market share caught up with Synopsys. I think core EDA in his definition does not include IP, HW (like emulation boxes), or any of the system level tools.

Cadence does a much "better" job bundling their tools, especially in the almost monopoly analog mixed signal. One would for example think DRC/LVS Synopsys is way ahead of Cadence, but the actual number might be a lot closer than people think. Don't forget Synopsys messed up ICC2 transition, allowing cadence to catch up on P&R. While both companies are boasting about their wins, cadence is gaining upper hand with digital flow catching up.

Sassine is a good guy. I do like him. But he is in a very hot seat right now. One does not have to add an activist board member if there are no issues, at least from wall street point of view. The biggest issue to me is Anirudh being a technical guy, can and have been very effectively drive vision, direction, and execution through the company, while Sassine has too many lieutenants that have their own ideas.
 
I hear Cadence is catching up on market share but I do not see it. Do you have a reference? Everywhere I go I see Synopsys tools. Certainly Virtuoso is a lock and Cadence has a big emulation story. I'm just not seeing it in the rest of the flow. The Synopsys Ansys acquisition was brilliant. Cadence actually started the acquisition talks with Ansys but Synopsys went over the top big time. Synopsys is also draining top talent from Siemens:


On the IP side, Synopsys is a monster. We just finished our Interface and Design IP reports and Synopsys is getting even stronger.


So where are the numbers showing Cadence beating Synopsys in the flow?

Bottom line: Sassine is a new type of CEO bringing EDA competition to a whole new level, absolutely.
oh on ansys, Synopsys really cannot afford for cadence to have Ansys. On the other hand, regulatory approval risk is a major factor for Ansys to make the decision to go with Synopsys
 
Jay Vleeschhouwer at DAC last month did his usual EDA industry landscape talk, and i believe for the 1st time he mentioned candence core EDA market share caught up with Synopsys. I think core EDA in his definition does not include IP, HW (like emulation boxes), or any of the system level tools.

Cadence does a much "better" job bundling their tools, especially in the almost monopoly analog mixed signal. One would for example think DRC/LVS Synopsys is way ahead of Cadence, but the actual number might be a lot closer than people think. Don't forget Synopsys messed up ICC2 transition, allowing cadence to catch up on P&R. While both companies are boasting about their wins, cadence is gaining upper hand with digital flow catching up.

Sassine is a good guy. I do like him. But he is in a very hot seat right now. One does not have to add an activist board member if there are no issues, at least from wall street point of view. The biggest issue to me is Anirudh being a technical guy, can and have been very effectively drive vision, direction, and execution through the company, while Sassine has too many lieutenants that have their own ideas.

Sorry I missed Jay. I have a couple of other sources to check but it looks like you are right.
 
Another Company at the top of its food chain turning the screw on its customers.

At some point something gonna give.
 
Jay Vleeschhouwer at DAC last month did his usual EDA industry landscape talk, and i believe for the 1st time he mentioned candence core EDA market share caught up with Synopsys. I think core EDA in his definition does not include IP, HW (like emulation boxes), or any of the system level tools.

Cadence does a much "better" job bundling their tools, especially in the almost monopoly analog mixed signal. One would for example think DRC/LVS Synopsys is way ahead of Cadence, but the actual number might be a lot closer than people think. Don't forget Synopsys messed up ICC2 transition, allowing cadence to catch up on P&R. While both companies are boasting about their wins, cadence is gaining upper hand with digital flow catching up.

Sassine is a good guy. I do like him. But he is in a very hot seat right now. One does not have to add an activist board member if there are no issues, at least from wall street point of view. The biggest issue to me is Anirudh being a technical guy, can and have been very effectively drive vision, direction, and execution through the company, while Sassine has too many lieutenants that have their own ideas.

You are correct, it has been happening over the last two years, based solely on revenue. The one question people have is how much of the Cadence revenue is hardware versus software? Cadence leads the way with emulators and these things cost many millions of dollars which skews revenue. It is kind of like letting Synopsys include IP in EDA revenue.

I talked to a bunch of my design start contacts and asked about tools. Just about everyone of them use both Synopsys and Cadence so it is hard to count design wins for EDA companies.

Interesting topic, I will spend more time on this...
 
View attachment 5137

Sassine Ghazi, Synopsys CEO, joins ‘Squawk on the Street’ to discuss the company’s latest earnings report and partnership with Nvidia.

Best question:

Q: Is Cadence taking core EDA market share? Intel and Samsung were both mentioned.

A: It is not factual. Synopsys is the leader in EDA for 10+ years.

 
View attachment 5137

Sassine Ghazi, Synopsys CEO, joins ‘Squawk on the Street’ to discuss the company’s latest earnings report and partnership with Nvidia.

Best question:

Q: Is Cadence taking core EDA market share? Intel and Samsung were both mentioned.

A: It is not factual. Synopsys is the leader in EDA for 10+ years.

I am sure you will get a different answer from Cadence CEO :)

Reality is, industry does not have a bottom up approach to separate FUD and what design teams are using in production. 25 years ago, we had the similar situation, related to P&R. John Cooley made his name, for the most part, by starting a grassroot pooling on which vendors (Synopsys/cadence/Avanti/Magma/Monterey/...) P&R tool are used, and how they are used in TO.
 
I am sure you will get a different answer from Cadence CEO :)

Reality is, industry does not have a bottom up approach to separate FUD and what design teams are using in production. 25 years ago, we had the similar situation, related to P&R. John Cooley made his name, for the most part, by starting a grassroot pooling on which vendors (Synopsys/cadence/Avanti/Magma/Monterey/...) P&R tool are used, and how they are used in TO.

But wait, he said it is not factual! :ROFLMAO:

I worked for Avant! in the early days. Rarely did we see a single vendor flow. There were point tools everywhere. It is still like that today but less point tools. So when one of the big EDA companies claims a tape-out you can bet another vendor is claiming the same thing.

SemiWiki now owns the gold standard Interface IP Report:


Synopsys is in fact the #1 Interface IP vendor so he was speaking factual on that one.
 
But wait, he said it is not factual! :ROFLMAO:

I worked for Avant! in the early days. Rarely did we see a single vendor flow. There were point tools everywhere. It is still like that today but less point tools. So when one of the big EDA companies claims a tape-out you can bet another vendor is claiming the same thing.

SemiWiki now owns the gold standard Interface IP Report:


Synopsys is in fact the #1 Interface IP vendor so he was speaking factual on that one.
agree on IP. Synopsys have persistently invested in hard IP for almost 25 years, with the most comprehensive portfolio in both title and foundry nodes. Cadence, on the other hand, has swinged from IP and not IP investment a few times. The current management seems to be investing heavily to catch up, but the gap there compared to Synopsys is much bigger than EDA tools
 
I wonder what all this AI related spending is replacing in the economy as a whole?

Or is this new money folk had under the bed , waiting to spend?
 
Synopsys vs Cadence 2026.jpg


I asked ChatGPT Who is winning the race between cadence and synopsys?

The cleanest verdict is:

Synopsys is ahead in overall strategic position, but Cadence is currently executing better and gaining momentum. I would call Synopsys the leader and Cadence the faster runner.

1788244097333.png

Why Synopsys is technically in front​

Synopsys has historically held the stronger position in large digital ASIC and system-on-chip projects. Its principal advantages include:
  • * Design Compiler and Fusion Compiler for synthesis and implementation
  • * PrimeTime for timing sign-off
  • * VCS and Verdi in verification and debugging
  • * A very large catalog of interface and foundation IP
  • * Strong relationships with advanced foundries and CPU/GPU designers
Exact market-share estimates vary because companies define “EDA” and semiconductor IP differently, but outside estimates generally place Synopsys narrowly ahead of Cadence. The difference is not large enough to create a winner-take-all market: major chip companies routinely use tools from both.

The $35 billion Ansys acquisition makes Synopsys considerably broader. It can now connect chip design with thermal, mechanical, electromagnetic, fluid and structural simulation. That is strategically important for chiplets, 3D packaging and AI racks, where heat, power delivery and mechanical behavior are becoming part of semiconductor design.

Synopsys reported Q3 FY2026 revenue of $2.48 billion and raised its full-year revenue midpoint to $9.72 billion, citing particularly strong EDA demand. However, the growth comparison includes Ansys, so it should not be read as pure organic EDA growth. Synopsys Q3 results

Why Cadence currently looks sharper​

Cadence has steadily closed gaps in digital implementation while defending its leadership in analog, custom design, PCB and packaging.

Its current execution is exceptionally good:
  • - Q2 2026 revenue grew 24% year over year
  • - Backlog reached a record $8.1 billion
  • - Non-GAAP operating margin reached 45.5%
  • - Management raised expected 2026 revenue growth to approximately 19%
Those figures include acquisitions, but Cadence’s results still present a cleaner growth story than the acquisition-transformed Synopsys numbers. Cadence Q2 results

Cadence also appears particularly well positioned for the move from individual chips toward entire electronic systems:
  • - Virtuoso for analog/custom silicon
  • - Allegro and Sigrity for boards, packages and power integrity
  • - Celsius for thermal analysis
  • - Palladium and Protium for hardware-assisted verification
  • - Innovus and Cerebrus for digital implementation and optimization
Its new AI agents extend across chip, package and PCB workflows. AuraStack, for example, is being tested by Nvidia, TSMC and Schneider Electric, although vendor productivity claims remain too early to treat as proven competitive advantage. Reuters on Cadence AuraStack

The Ansys question is decisive​

Synopsys has made the larger strategic bet:
1788244173050.png


If Synopsys successfully integrates Ansys—technically and commercially—it will possess the broadest silicon-to-systems platform in the industry. That could make it the clear long-term winner.

But integration creates several risks:
  • * A much more complicated product portfolio
  • * Distraction from the core EDA franchise
  • * Organizational restructuring and layoffs
  • * Required product divestitures
  • * Potential customer concern about bundling or vendor dependence
  • * Pressure to turn theoretical cross-selling into actual revenue
Cadence’s approach is more incremental and internally coherent. It has less transformative upside, but also less execution risk.

AI probably strengthens both companies​

AI affects them in two favorable ways:
  1. 1. Customers are designing more custom accelerators, networking chips and chiplets.
  2. 2. AI inside EDA tools can improve optimization and consume more compute-based licenses.
Synopsys recently introduced autonomous verification and engineering workflows, including claims of up to 50× faster time to validated RTL in selected use cases. Synopsys AI workflow announcement

The important caveat is that AI is unlikely to let one vendor rapidly displace the other. EDA flows are qualified over years, tied to foundry process-design kits and embedded in customer methodology. Switching costs are immense. Customers are more likely to adopt AI as an additional layer over their existing Cadence and Synopsys tools.

Bottom line

  • * Best current business execution: Cadence
  • * Strongest core digital EDA and IP position: Synopsys
  • * Broadest long-term platform: Synopsys after Ansys
  • * Lower-risk operating story: Cadence
  • * Likeliest market outcome: Both keep winning, with customers continuing to use mixed toolchains
If forced to choose who is “winning the race” today, I would give Synopsys a narrow strategic lead, but Cadence the lead on momentum and execution. The decisive test over the next two to three years will be whether Synopsys converts Ansys into an integrated design platform—or whether the integration gives Cadence an opening to take more core EDA share.
 
Back
Top