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Google and Nvidia Consider Intel as Backup Chip Manufacturer

Surely the biggest issue with TSMC adopting high-NA is not just the economics/throughput, but the sheer number of machines that would be needed to support the massive market demand (with several GigaFabs for each new node) compared to the rate that ASML can make them -- and especially, the rate that Zeiss can make the optics?

It's a lot easier for a smaller-volume foundry like Intel, they only need a fraction of the number of high-NA tools that TSMC would...
 
Surely the biggest issue with TSMC adopting high-NA is not just the economics/throughput, but the sheer number of machines that would be needed to support the massive market demand (with several GigaFabs for each new node) compared to the rate that ASML can make them -- and especially, the rate that Zeiss can make the optics?

It's a lot easier for a smaller-volume foundry like Intel, they only need a fraction of the number of high-NA tools that TSMC would...

Intel will probably need fewer units, but the challenges of cost and throughput may not be any less—if not greater. For example, ideally, the more High NA EUV tools that are installed and the more chips that are produced, the less of the expensive initial R&D cost each chip must bear. Economies of scale are critical in leading-edge semiconductor manufacturing.

Another problem is that if you don't have enough machines and sufficient throughput/output, large-volume customers simply can't afford to use your services. As a result, you limit yourself to becoming a niche manufacturer for small orders. That's not necessarily bad, but the margin for error or delay is slim.
 
Link no 1 To received i.e. grammar error, sound like to be received - behind pay wall can't tell but the headline is "to (sic) be".
Link no 2 "將於今年底前首件交貨" i.e. Will Be
Link No3 "媒體報導,先前市場消息指出,台積電已經於 2024 年 9 月份從荷蘭半導體設備商艾司摩爾 (ASML) 接收首套高數值孔徑 (High-NA) 極紫外線 (EUV) 曝光機-EXE:5000。" - "市場消息指出" i.e. Market Information, where the information from i.e Rumor.

Link 1 is Japanese translation English error, to received, i.e. to be received, to be or even (sic) going to receive is future tense, i.e going to be
Link 2 Will be
Link 3 rumor installed. No location, nothing.

Do not change a single thing

I spent 3 months to search it, enjoy your search of proof.
 
Surely the biggest issue with TSMC adopting high-NA is not just the economics/throughput, but the sheer number of machines that would be needed to support the massive market demand (with several GigaFabs for each new node) compared to the rate that ASML can make them -- and especially, the rate that Zeiss can make the optics?

It's a lot easier for a smaller-volume foundry like Intel, they only need a fraction of the number of high-NA tools that TSMC would...

Are you implying there are other companies in the semiconductor chain?

Who knew?
 
Are you implying there are other companies in the semiconductor chain?

Who knew?
No, I'm saying that given the time needed to build new high-NA tools in volume it's easier for a smaller-volume foundry like Intel to adopt them than a huge-volume one like TSMC. Is that so hard to understand?

It doesn't matter how wonderful the shiny new sexy technology is if you can't get enough of it to meet your customer's needs... ;-)
 
No, I'm saying that given the time needed to build new high-NA tools in volume it's easier for a smaller-volume foundry like Intel to adopt them than a huge-volume one like TSMC. Is that so hard to understand?

It doesn't matter how wonderful the shiny new sexy technology is if you can't get enough of it to meet your customer's needs... ;-)

Was being a smart alec.

If this site and the media was to be believed there are only 3 or 4 Companies in the entire semicon chain.
 
Link no 1 To received i.e. grammar error, sound like to be received - behind pay wall can't tell but the headline is "to (sic) be".
Link no 2 "將於今年底前首件交貨" i.e. Will Be
Link No3 "媒體報導,先前市場消息指出,台積電已經於 2024 年 9 月份從荷蘭半導體設備商艾司摩爾 (ASML) 接收首套高數值孔徑 (High-NA) 極紫外線 (EUV) 曝光機-EXE:5000。" - "市場消息指出" i.e. Market Information, where the information from i.e Rumor.

Link 1 is Japanese translation English error, to received, i.e. to be received, to be or even (sic) going to receive is future tense, i.e going to be
Link 2 Will be
Link 3 rumor installed. No location, nothing.

Do not change a single thing

I spent 3 months to search it, enjoy your search of proof.
Yesterday Semicon Taiwan, ASML EVP publically said there are 10 Hi-NA deployed in 4 different customers today. Will it change your mind that tsmc also has HiNA machine? or you still don't belive tsmc is one of 4 customers?

https://technews.tw/2026/09/01/high-na-euv-moving-towards-the-era-of-high-volume-production/
 
TSMC might not have more machines than Intel
Indeed, but more HiNA today doesn't mean a good thing to me. HiNA is still a R&D machine for 4 companies to develop next generation node. Both of Samsung and tsmc target to use HiNA in HVM ~2029 for reasons. Have >2 machines now is just a waste and even a "marketing tactics" to secure investor confidence. Assuming no HiNA in tsmc as a evidenc to downplay tsmc is also not wise. Like ASML EVP said, HiNA machine up-time is just 83%, which proved HiNA is not a HVM machine yet.
 
Indeed, but more HiNA today doesn't mean a good thing to me. HiNA is still a R&D machine for 4 companies to develop next generation node. Both of Samsung and tsmc target to use HiNA in HVM ~2029 for reasons. Have >2 machines now is just a waste and even a "marketing tactics" to secure investor confidence. Assuming no HiNA in tsmc as a evidenc to downplay tsmc is also not wise. Like ASML EVP said, HiNA machine up-time is just 83%, which proved HiNA is not a HVM machine yet.
Both TSMC and Intel are still deciding how and when to use High-NA. As I said 2 years ago.... the war will not be won based on High NA. Companies ran EUV for years in development before HVM ramp. Intel apparently is using High NA for some of its 18A in oregon .... this is good for learning and development. Remember when people said Intel was going to corner the market on HIgh NA and TSMC would never get one and would fall way behind??? hilarious
 
Yesterday Semicon Taiwan, ASML EVP publically said there are 10 Hi-NA deployed in 4 different customers today. Will it change your mind that tsmc also has HiNA machine? or you still don't belive tsmc is one of 4 customers?
https://technews.tw/2026/09/01/high-na-euv-moving-towards-the-era-of-high-volume-production/

Some are early R&D tools and some are production tools. I believe Intel, TSMC, and Samsung have the early R&D tools as they were first. The questions is when can ASLM produce enough HNA-EUV tools for TSMC to go into production? They need dozens of these if they are doing 10 layers?
 
Yesterday Semicon Taiwan, ASML EVP publically said there are 10 Hi-NA deployed in 4 different customers today. Will it change your mind that tsmc also has HiNA machine? or you still don't belive tsmc is one of 4 customers?

https://technews.tw/2026/09/01/high-na-euv-moving-towards-the-era-of-high-volume-production/
This just confirm that TSMC have 0 High NA EUV machine, rather just to said they have 0.5 machine share with the EU research agency

The English is the map call it site ("a planned site"), See you have 2 dot in South Korea, i.e. Samsung, SK, 1 dot in the west coast of US i.e. Intel, 1 dot in the east coast of US i.e. NY Create.


The 4 Customers are

Intel
Samsung
SK Hynix
IBM Leaded group i.e. Micron, etc. (named NY Create)

Which ASML management is presented on the opening.

No TSMC, we have 4 photo = 4 customers and TSMC is not in that List, I saw the dot is on Taiwan, but that just don't match the count and you can see one dot in EU, i.e. the EU research lab that 0.5 machine of TSMC located.
4 customers = 4 customers and not TSMC, as EU research lab one is the machine that use to developed the machine to be deploy and also used by ASML internal team. i.e. not external customer
 
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This just confirm that TSMC have 0 High NA EUV machine, rather just to said they have 0.5 machine share with the EU research agency

The English is the map call it site ("a planned site"), See you have 2 dot in South Korea, i.e. Samsung, SK, 1 dot in the west coast of US i.e. Intel, 1 dot in the east coast of US i.e. NY Create.


The 4 Customers are

Intel
Samsung
SK Hynix
IBM Leaded group i.e. Micron, etc. (named NY Create)

Which ASML management is presented on the opening.

No TSMC, we have 4 photo = 4 customers and TSMC is not in that List, I saw the dot is on Taiwan, but that just don't match the count and you can see one dot in EU, i.e. the EU research lab that 0.5 machine of TSMC located.
4 customers = 4 customers and not TSMC, as EU research lab one is the machine that use to developed the machine to be deploy and also used by ASML internal team. i.e. not external customer
I see. The chart said "10 WW systems operational meeting full specifications across 4 customers. Beyond that, 3 systems are being shipped and installed". There are 6 dots on the map, one in Taiwan, two in Korea, one in US East coast, one in US West coast, one in West Europe. The total 13 (10 running + 3 under-installations) HiNA machines are shared in these 6 dots. May I know why you conclude there is no tsmc in those 4 customers?

Just curious, tsmc has 50%+ EUV install base in the world today. Do you believe tsmc still doesn't have any next-gen EUV machine inhouse and even behind Hynix?
ASML-1.png
 
4 Photos

SK - https://www.trendforce.com/news/202...e-betting-big-intel-samsung-sk-hynix-or-tsmc/
Intel - https://www.datacenterdynamics.com/en/news/intel-receives-its-high-na-euv-scanner-from-asml/
NY create - https://ny-creates.org/governor-hoc...nced-equipment-for-semiconductor-chip-design/
Samsung - Always active said yes, so was not even aware. And I always confused with the research centre i.e. Hwaseong Campus, they are right next to each other and I was confused with the campus to the machine


so Instead of Samsung

IMEC - https://www.imec-int.com/en/press/imec-receives-worlds-most-advanced-high-na-euv-system

So now the list of 4 customer installed is

SK
Intel
NY create
IMEC

But there is a believe out there that intel have 6 machine

SK - 2 (educated guess)
Intel - 6 (or even 7 1 EXE 5000 6 EXE 5200)
NY create - 1
IMEC - 1
 
Last edited:
I see. The chart said "10 WW systems operational meeting full specifications across 4 customers. Beyond that, 3 systems are being shipped and installed". There are 6 dots on the map, one in Taiwan, two in Korea, one in US East coast, one in US West coast, one in West Europe. The total 13 (10 running + 3 under-installations) HiNA machines are shared in these 6 dots. May I know why you conclude there is no tsmc in those 4 customers?

Just curious, tsmc has 50%+ EUV install base in the world today. Do you believe tsmc still doesn't have any next-gen EUV machine inhouse and even behind Hynix?
View attachment 5150

Based on the information and the deployment map given by Mrs. Greet Storms, Senior Vice President and Head of High-NA EUV Product Management at ASML, along with other previous news reports, here is my estimate of High NA EUV machine deployment at each company or institution. Because she didn't state where and how those machines are installed or in use, I combined the 10 (installed) and 3 (being delivered or under installation) for a total of 13 units.

Current Hing NA EUV Machine Deployment:

A. Intel (Oregon): 5 (or 4)
B. Albany NanoTech Complex/IBM, Micron, Applied Materials, Tokyo Electron, ASML, Universities (Albany, New York): 1
C. IMEC (Belgium): 1
D. TSMC (Taiwan): 2
E. SK Hynix (South Korea): 2
F. Samsung (South Korea): 2 (or 3)

Total: 13 units.


Some considerations:
  1. 1. Because High NA EUV is still undergoing heavy development work and requires software and hardware updates, adjustments, and modifications when necessary, it's probably more practical and efficient for TSMC, SK Hynix, and Samsung to each have at least two machines to keep their R&D and testing activities on schedule. Each of them has huge profits, R&D budgets, and CapEx to support acquiring more once the major technical and productivity/yield issues are resolved.

  2. 2. During TSMC's annual shareholders meeting held on June 4, 2026, TSMC CEO C.C. Wei stated that TSMC had bought at least one unit of the High NA EUV machine.

  3. 3. There was a news report that Samsung is getting two more units in addition to the existing R&D unit. The timing is not publicly available.

  4. 4. Given the globally total of 13 units cited by ASML's Greet Storms, Intel may own 4 to 5 units of High NA EUV. Due to Intel's tight financial situation, it's unlikely Intel has significantly more, no more than 6 units total.
 
so
4 Photos

SK - https://www.trendforce.com/news/202...e-betting-big-intel-samsung-sk-hynix-or-tsmc/
Intel - https://www.datacenterdynamics.com/en/news/intel-receives-its-high-na-euv-scanner-from-asml/
NY create - https://ny-creates.org/governor-hoc...nced-equipment-for-semiconductor-chip-design/
Samsung - Always active said yes, so was not even aware. And I always confused with the research centre i.e. Hwaseong Campus, they are right next to each other and I was confused with the campus to the machine


so Instead of Samsung

IMEC - https://www.imec-int.com/en/press/imec-receives-worlds-most-advanced-high-na-euv-system

So now the list of 4 customer installed is

SK
Intel
NY create
IMEC

But there is a believe out there that intel have 6 machine

SK - 2 (educated guess)
Intel - 6 (or even 7 1 EXE 5000 6 EXE 5200)
NY create - 1
IMEC - 1
so all the information you collected is from desktop search. Why you still don't believe tsmc and Samsung (1st and 2nd largest EUV install base today) have HiNA already?

  1. TrendForce (Nov. 25, 2024)
    AI Chip Demand Spurs TSMC's High-NA EUV Deployment
    Reports that TSMC received its first ASML EXE:5000 High-NA EUV machine in 2024 and is preparing it for future sub-2nm manufacturing.
    Link: https://www.trendforce.com/news/2024/11/25/news-ai-chip-demand-spurs-tsmcs-high-na-euv-deployment/ [trendforce.com]
  2. TechSpot (Nov. 16, 2024)
    TSMC prepares for next-gen chip manufacturing with high-NA EUV investments
    States that TSMC was expected to receive its first High-NA EUV system and that some reports indicated installation at TSMC's Hsinchu R&D center.
    Link: https://www.techspot.com/news/105604-tsmc-prepares-next-gen-chip-manufacturing-high-na.html [techspot.com]
=======
For the 13 systems, my estimate would be something like:

Intel: 4-5 systems
TSMC: 2-3 systems
Samsung: 1-2 systems
SK hynix: 1-2 systems
imec: 1 system
NY CREATES: 1 system
 
Based on the information and the deployment map given by Mrs. Greet Storms, Senior Vice President and Head of High-NA EUV Product Management at ASML, along with other previous news reports, here is my estimate of High NA EUV machine deployment at each company or institution. Because she didn't state where and how those machines are installed or in use, I combined the 10 (installed) and 3 (being delivered or under installation) for a total of 13 units.

Current Hing NA EUV Machine Deployment:

A. Intel (Oregon): 5 (or 4)
B. Albany NanoTech Complex/IBM, Micron, Applied Materials, Tokyo Electron, ASML, Universities (Albany, New York): 1
C. IMEC (Belgium): 1
D. TSMC (Taiwan): 2
E. SK Hynix (South Korea): 2
F. Samsung (South Korea): 2 (or 3)

Total: 13 units.


Some considerations:
  1. 1. Because High NA EUV is still undergoing heavy development work and requires software and hardware updates, adjustments, and modifications when necessary, it's probably more practical and efficient for TSMC, SK Hynix, and Samsung to each have at least two machines to keep their R&D and testing activities on schedule. Each of them has huge profits, R&D budgets, and CapEx to support acquiring more once the major technical and productivity/yield issues are resolved.

  2. 2. During TSMC's annual shareholders meeting held on June 4, 2026, TSMC CEO C.C. Wei stated that TSMC had bought at least one unit of the High NA EUV machine.

  3. 3. There was a news report that Samsung is getting two more units in addition to the existing R&D unit. The timing is not publicly available.

  4. 4. Given the globally total of 13 units cited by ASML's Greet Storms, Intel may own 4 to 5 units of High NA EUV. Due to Intel's tight financial situation, it's unlikely Intel has significantly more, no more than 6 units total.
TSMC is 0.5 that is the fact the one with IMEC, no photo
Samsung 0 - no photo

Intel is 6 - 7

As mentioned ASML said 10, don't goes for 13, simply not the truth.

This is an important PR for all the party involve, have PR have machine, no PR no machine

Samsung - No ASML PR = No Machine
TSMC - No ASML PR = No Machine

Just a big month is not enough.

Remember Intel is doing High NA EUV on some of the layers for 18A/18AP with a 30-35K Wafer Per Month Range.

That is 1.5-2.0 fab count of Wafer Per Month on TSMC standard.

The number will not line up if those installed machine is not used to make 18A/AP, i.e. not enough EUV machine.

Most of the EUV machine that Intel brough previously is in Ireland (up until 2025 at least)

There is no way that Intel can achieve 30K production if they don't have in total if they don't have 40 machines (no matter EUV or high na)
there are only ~65 machine that ASML producing each year and that is like 140 machine produced in 2 years.
TSMC with all the expansion likely already have 50 of those, 20 machine is share between SK, Samsung, Rapius, ... others. it just left intel with like 30-40 machines.

A bit tight but not impossible.

Remember Intel GAA is 4 stack and TSMC is 3 stack, it is reasonable to believe that Intel needed 20% more machine even that is the same wafer per month as there is an extra stack to make.

In order to achieve the 35K mark, which is necessary i.e. Panther Lake, Clearwater Forest, Wildcat Lake .... Risk production ... Nova Lake, Diamond Rapid .... (possible Apple M7) the 35K wafer per month can easily be not enough and / or increase to 40K by the end of the year.

Based on pure volume and the CAPEX spending in Q2 report, it is more likely that Intel will have 6 if not 7 of those ASML High NA, which will enable the smooth transition to 14A, that is 30-40 machine, provide just added Terafab + Intel own needs.

The total they got on the market recently is 18B ???, plus they make 1B in Q2 2026 and forecast at least 1.2-2.2B pure profit very quarter till Q4 2027. That is already another 8-12B in profit. In total, that meant they raised ~30B for everything and that is a lot lot lot more, plus if Elon Musk is truth, some of the Terafab capacity money will be deposit to Intel before Q4 2027 in order to make sense. Plus finally another 3-5B the final milestone payment for the share that Trump purchased.

My friend that is like 30B-40B just like this. I know that there are other cost like buildings ... HVAC ..... but the money is enough to buy 100 of the machines
 
Last edited:
so

so all the information you collected is from desktop search. Why you still don't believe tsmc and Samsung (1st and 2nd largest EUV install base today) have HiNA already?

  1. TrendForce (Nov. 25, 2024)
    AI Chip Demand Spurs TSMC's High-NA EUV Deployment
    Reports that TSMC received its first ASML EXE:5000 High-NA EUV machine in 2024 and is preparing it for future sub-2nm manufacturing.
    Link: https://www.trendforce.com/news/2024/11/25/news-ai-chip-demand-spurs-tsmcs-high-na-euv-deployment/ [trendforce.com]
  2. TechSpot (Nov. 16, 2024)
    TSMC prepares for next-gen chip manufacturing with high-NA EUV investments
    States that TSMC was expected to receive its first High-NA EUV system and that some reports indicated installation at TSMC's Hsinchu R&D center.
    Link: https://www.techspot.com/news/105604-tsmc-prepares-next-gen-chip-manufacturing-high-na.html [techspot.com]
=======
For the 13 systems, my estimate would be something like:

Intel: 4-5 systems
TSMC: 2-3 systems
Samsung: 1-2 systems
SK hynix: 1-2 systems
imec: 1 system
NY CREATES: 1 system
my_wing said:
Link no 1 To received i.e. grammar error, sound like to be received - behind pay wall can't tell but the headline is "to (sic) be".
Link no 2 "將於今年底前首件交貨" i.e. Will Be
Link No3 "媒體報導,先前市場消息指出,台積電已經於 2024 年 9 月份從荷蘭半導體設備商艾司摩爾 (ASML) 接收首套高數值孔徑 (High-NA) 極紫外線 (EUV) 曝光機-EXE:5000。" - "市場消息指出" i.e. Market Information, where the information from i.e Rumor.

Link 1 is Japanese translation English error, to received, i.e. to be received, to be or even (sic) going to receive is future tense, i.e going to be
Link 2 Will be
Link 3 rumor installed. No location, nothing.

Do not change a single thing

I spent 3 months to search it, enjoy your search of proof.

Keep this post 3 months ago still the truth
 
my_wing said:
Link no 1 To received i.e. grammar error, sound like to be received - behind pay wall can't tell but the headline is "to (sic) be".
Link no 2 "將於今年底前首件交貨" i.e. Will Be
Link No3 "媒體報導,先前市場消息指出,台積電已經於 2024 年 9 月份從荷蘭半導體設備商艾司摩爾 (ASML) 接收首套高數值孔徑 (High-NA) 極紫外線 (EUV) 曝光機-EXE:5000。" - "市場消息指出" i.e. Market Information, where the information from i.e Rumor.

Link 1 is Japanese translation English error, to received, i.e. to be received, to be or even (sic) going to receive is future tense, i.e going to be
Link 2 Will be
Link 3 rumor installed. No location, nothing.

Do not change a single thing

I spent 3 months to search it, enjoy your search of proof.

Keep this post 3 months ago still the truth
understood and enjoy your "truth", even though it's 100% conflicted with what I know.
 
High-NA EUV scores highly on the "look at our sexy bleeding-edge technology" measure (which is why Intel and Samsung are so bullish), not so much on the "helps produce higher-performance higher-yielding lower-cost chips" measure (which is why TSMC aren't so bullish). It's going to be several more process generations before high-NA becomes as essential as EUV was at 5nm.

It's a good bet that by the time the second measure becomes true (2030?), TSMC will have more high-NA machines than anyone else -- probably, more than everyone else put together... ;-)

(always assuming ASML can make enough machines, and critically that Zeiss can make enough mirrors...)
 
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