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Viettel Semiconductor
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Every T/R module program eventually has this conversation: "Why not just stay on GaAs? We know the process, the foundries are mature, and qualification is a solved problem." It's a fair question, and for a meaningful slice of designs, GaAs pHEMT is still the right answer. The mistake is treating this as a technology-superiority debate instead of a fit-for-application one. Here's the actual decision map.
Thermal headroom under duty cycle. SiC substrates conduct heat considerably better than GaAs — one of the reasons GaN-on-SiC has displaced GaN-on-Si in demanding RF applications. In pulsed radar operation with duty cycles that stress junction temperature, that thermal margin translates directly into either higher reliable output power or longer MTBF at the same power — an easier trade to make than most program managers expect going in.
Fewer stages for the same output power. Because GaN devices deliver more watts per millimeter of gate periphery, a GaN PA often reaches target output power with fewer amplification stages than the equivalent GaAs design. Fewer stages means fewer failure points, simpler bias sequencing, and — often overlooked — better linearity margin because you're not cascading gain-compression errors across as many stages.
Process maturity and cost at moderate power. GaAs foundry capacity is broader, more processes are qualified across more military and space programs, and for designs under roughly 10W, the cost-per-part advantage of GaAs can outweigh GaN's power-density benefit that you're not actually using.
Linearity in narrowband, moderate-power designs. Some GaAs pHEMT variants still hold an edge in third-order intercept performance for narrowband applications where GaN's broader power handling isn't the limiting spec.
The honest answer most architects arrive at is a mixed BOM: GaN where power density and thermal margin are the binding constraint (PA stages, high-power switches), GaAs where noise figure or legacy qualification dominate (some LNA front ends, lower-power auxiliary chains). Treating it as an either/or choice at the program level usually means over-paying for GaN where you didn't need the power, or hitting a thermal wall with GaAs where you did.
Where GaN-on-SiC wins outright
Power density. GaN's wider bandgap and higher breakdown voltage let it operate at 28–48V rails instead of GaAs's typical 5–10V, and it delivers substantially higher output power per millimeter of die area at those voltages. For a PA stage in an AESA T/R module — where every extra millimeter of die real estate multiplies across hundreds or thousands of elements — this isn't a marginal improvement, it's the difference between a module that fits the array pitch and one that doesn't.Thermal headroom under duty cycle. SiC substrates conduct heat considerably better than GaAs — one of the reasons GaN-on-SiC has displaced GaN-on-Si in demanding RF applications. In pulsed radar operation with duty cycles that stress junction temperature, that thermal margin translates directly into either higher reliable output power or longer MTBF at the same power — an easier trade to make than most program managers expect going in.
Fewer stages for the same output power. Because GaN devices deliver more watts per millimeter of gate periphery, a GaN PA often reaches target output power with fewer amplification stages than the equivalent GaAs design. Fewer stages means fewer failure points, simpler bias sequencing, and — often overlooked — better linearity margin because you're not cascading gain-compression errors across as many stages.
Where GaAs pHEMT still wins
Noise figure at the low-power end. For LNA-first-stage performance, mature GaAs pHEMT processes still post some of the best noise figures available, particularly at lower frequencies and lower power levels where GaN's power advantage isn't doing any work for you. If your architecture's dominant sensitivity driver is receive noise figure rather than transmit power, GaAs is not automatically the compromise choice.Process maturity and cost at moderate power. GaAs foundry capacity is broader, more processes are qualified across more military and space programs, and for designs under roughly 10W, the cost-per-part advantage of GaAs can outweigh GaN's power-density benefit that you're not actually using.
Linearity in narrowband, moderate-power designs. Some GaAs pHEMT variants still hold an edge in third-order intercept performance for narrowband applications where GaN's broader power handling isn't the limiting spec.
The map, condensed
The honest answer most architects arrive at is a mixed BOM: GaN where power density and thermal margin are the binding constraint (PA stages, high-power switches), GaAs where noise figure or legacy qualification dominate (some LNA front ends, lower-power auxiliary chains). Treating it as an either/or choice at the program level usually means over-paying for GaN where you didn't need the power, or hitting a thermal wall with GaAs where you did.