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The dose increase required to get the photon shot noise to pre-EUV levels will be exorbitant: https://semiwiki.com/lithography/357643-facing-the-quantum-nature-of-euv-lithography/
So, will it be used for increasing the throughput at same dose, or increasing the dose at same throughput? Again, the net benefit of increasing the dose depends on the resist.
Yes, the yield would be affected; it contributes into the defect density. So we hear of yields not being "stable", particularly in DRAM. 256 Mb SRAM yield could have been higher also.
In mid-2024, TSMC apparently indicated that they prioritized throughput over curing stochastics. TSMC "optimized the EUV exposure dose and the photoresist it uses" to double wafer-per-day-per-tool productivity of its EUV systems since 2019. The 500W NXE:3800 had not been installed anywhere yet...
My understanding is that while increasing dose is probably the earliest proposal, users have mostly not done so because of two reasons. First, most EUV machines still do not have enough power to provide enough throughput. Second, the resist has to be designed for higher dose.
Interestingly...
Absorbed photons are still only one component of noise. There's also secondary electrons. Also (dose-dependent) resist loss from a variety of mechanisms.
There are large teams of defect inspection engineers who work on this. The published "stochastic" defects are usually CD-dependent (there's a window), low-probability. But the closest an equipment can do would be particles. Those can have a variety of signatures. For small particles in wet...
Glad to see others sending the same message on a topic I've broached many times before. Chris has been in lithography since earlier than when I started. Another researcher in this field publishing relevant results with much more plentiful computational resources is Hiroshi Fukuda of Hitachi.
By Chris Mack, CTO, Fractilia 07.18.2025
The Stochastics resolution gap costs chipmakers billions in delayed yield ramps, compromised performance, and unrealized revenue at 2nm and below.
In semiconductor manufacturing, the laws of physics don’t negotiate. They don’t care about roadmaps or...
Just a few weeks ago, they were delaying the launch of the Texas fab even: https://www.trendforce.com/news/2025/07/04/news-samsung-reportedly-delays-texas-fab-launch-amid-client-shortage/ The construction deadline has been pushed to the end of October 2025. The process is still TBD it seems.
As I've been informed https://www.linkedin.com/feed/update/urn:li:activity:7353000817206980608?commentUrn=urn%3Ali%3Acomment%3A%28activity%3A7353000817206980608%2C7355188929756610561%29&dashCommentUrn=urn%3Ali%3Afsd_comment%3A%287355188929756610561%2Curn%3Ali%3Aactivity%3A7353000817206980608%29...
The basic problem is ASML wants control over the light source. That's the reasoning behind the Cymer acquisition.
The previous American lithography machine maker SVG was also acquired by ASML.
Samsung Electronics is reportedly pushing back the mass production of its next-gen high-bandwidth memory (HBM) chips to 2026, signaling a more cautious rollout amid ongoing DRAM redesign efforts.
The company originally planned to start mass production of its 12-high HBM4 modules, which are...
Well, CFO had also mentioned that with the 18A test chips they had lost some customers: https://www.reuters.com/business/intel-has-limited-customer-commitments-latest-chip-manufacturing-tech-cfo-says-2025-05-13/.
