You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
There's some more on the differences among the N7 processes here: https://www.eettaiwan.com/20200115nt61-7nm-comparision/ although N6 was not out yet it seems. But there's actually an N7P different from N7+.
I just checked TSMC's site now, it seems to be consistent with as you say:
https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_5nm
In 2020, TSMC became the first foundry to move 5nm FinFET (N5) technology into volume production and enabled customers’ innovations in smartphone and...
It's based on a cryogenic spintronic device. IMEC had been fabricating the chips for them. It looks like electron-beam lithography is still being used on these demo chips. I think it's because the volume is not enough to justify making a set of masks.
Major memory companies are accelerating their investments in 1c (6th-generation 10nm-class) DRAM. Samsung Electronics has already begun building mass production lines since the first half of this year, and SK Hynix is reportedly discussing specific plans for its recent conversion investment...
It's not just the money to spend. You have to have all the equipment vendors like ASML only supply Intel for a good year or two just to get it to be able to support the capacity comparable to TSMC.
It's already a big task to manage TSMC's IP based in Taiwan: https://www.reuters.com/world/asia-pacific/tsmc-market-system-manage-trade-secrets-its-lawyer-says-2025-08-29/
Continuing from the same article:
The move is also heavily influenced by commercial and economic factors. TSMC’s most significant clients are predominantly American technology companies, including NVIDIA, Apple, Broadcom, and AMD, all of which rely on sourcing the most advanced semiconductor...
Taipei, Sept. 26 (CNA) Taiwan Semiconductor Manufacturing Co. (TSMC) reiterated Friday that the company has not entered discussions with any company about potential investments or partnerships amid ongoing rumors of ailing Intel seeking TSMC's participation.
In a statement, TSMC, the world's...
My understanding from BoA's count was that Intel only received 25 EUV systems during 5N4Y, and then got the 3 High-NA up to H1 this year. With so much less than what TSMC got, shouldn't expect to have the same level of EUV usage and I suppose that doesn't matter.
That report on SK hynix conflicts with this one: https://semiwiki.com/forum/threads/sk-hynix-builds-m15x-test-line-to-respond-to-hbm-demand.23690/
Historically, actual recognized sales has been lower than these forecasts.
ASML shipped five EXE:5000 and one EXE:5200 as of the Q2 2025 earnings call. The EXE:5200 may still be considered a development tool if it is the only High-NA capable of delivering higher power (for higher dose at sufficient throughput) and/or sufficient overlay. The EUV-induced plasma would be...
The trend has been wafer cost up, yield down, SRAM doesn't scale, gate pitch hasn't scaled well either. I think track pitch is starting to slow down as well now as approaching 20 nm.
For DRAM, smaller capacitors need to be relatively taller, otherwise they become swamped by parasitic...
