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TSMC started shipping 7nm in Q2, process environmentally approved

Fred Chen

Moderator
EIA for TSMC fab at Central Science Park approved - Taipei Times

Apparently, last week, the Central Taiwan Science Park Administration received approval from the Environmenal Protection Administration for the Environmental Impact Analysis (EIA) report, updated for TSMC's 7nm process.

TSMC apparently started shipping a small volume of 7nm from an "advanced fab in Taichung" (must be Fab 15) as of the date of the article (6/28).

"The company is making 7nm chips for 18 customers to use in their smartphones, servers, graphic processing units, artificial intelligence applications and cryptocurrency mining machines."
 
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Yes, TSMC has been very open about their 7nm progress. Apple will be the first followed by just about every other leading edge fabless and systems company. Yes even QCOM uses TSMC 7nm even though today they are taping out to Samsung 7nm.

Remember, for Apple to ship phones in Q4 they need HVM chips in Q2 so yes 7nm is in HVM. TSMC presented the 7nm status at a breakfast meeting at 55DAC last week. I will post the video link when it is up, probably next week.
 
TSMC confirmed they were in HVM on 7nm in their Q1 2018 earnings call in April. Apple launches their new iPhones in Sep. So TSMC needs to ship finished chips atleast by early Q3 to Apple's supply chain for them to have the phones ready for a Sep launch. TSMC is on executing very well. The only thing is I have been hearing that N7 might have been scaled back on perf targets to hit the time to market. If the leaked rumours of performance on Apple's upcoming A12 are true then its most probably that.

Possible A12 Geekbench score suggests next-gen iPhone X upgraded with 4GB RAM, 10% speed boost | 9to5Mac

btw we did hear a rumour few weeks back of higher scores. So we will not know until launch what the real perf is on the final shipping product.

Apple A12 Allegedly Obtains 5,200 Points in Geekbench, Marking a 24-30% Performance Improvement Over A11 Bionic

Daniel i would like to hear your thoughts. Do you think TSMC scaled back on perf targets to hit time to market and yields.
 
Daniel i would like to hear your thoughts. Do you think TSMC scaled back on perf targets to hit time to market and yields.

Please understand that Apple gets a custom version of TSMC processes. TSMC and Apple work closely together on devices, power, performance, and yield. Apple and TSMC then agree on when to freeze the process for production. This is why Apple's SoC numbers may not match others and TSMC certainly does not publish Apple's process numbers. Time to market is critical for Apple so they may give up some yield to get there. This is also why Apple is first to market because TSMC may hold the public process release for better yield.
 
Please understand that Apple gets a custom version of TSMC processes. TSMC and Apple work closely together on devices, power, performance, and yield. Apple and TSMC then agree on when to freeze the process for production. This is why Apple's SoC numbers may not match others and TSMC certainly does not publish Apple's process numbers. Time to market is critical for Apple so they may give up some yield to get there. This is also why Apple is first to market because TSMC may hold the public process release for better yield.

Thanks for the explanation.
 
Thanks for the explanation.

By the way, in the olden days (>28nm) designs were spread amongst multiple foundries so you could see process differences. Even if you compare Apple SoC generations (A10, A11, A12, etc...) architecture changes probably account for most of the performance improvements.
 
By the way, in the olden days (>28nm) designs were spread amongst multiple foundries so you could see process differences. Even if you compare Apple SoC generations (A10, A11, A12, etc...) architecture changes probably account for most of the performance improvements.

I was trying to reconcile some recent statements by ARM fellow Peter Greenhalgh with Apple's A11 clocks not moving at all after A10. A12 seems to also not increase frequency at all. I agree that Apple delivered big perf improvements to single thread and multi thread on A11 even when running at similar clocks as A10. But that says a lot more about Apple's chip design prowess in being able to increase IPC in a big way without any increase from process node driven frequency improvements

https://www.eetasia.com/news/article/18060102-arm-announces-high-performance-laptop-cpu

"There hasn't been much frequency benefit at all since 16 nm ... wire speed hasn't scaled for some time," said Peter Greenhalgh, an Arm fellow and vice president of technology.
 
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At the Q2 2018 call, 7nm was mentioned to be <1% of Q2 revenue, which is understandable with 10nm revenue still being generated.
 
The average user has no apps where speed of CPU matters. Size of memory will produce benefits in app switching, background apps, image manipulation and gaming. GPU core count will provide visible results on games, images, and some apps. But it makes sense to take the advantage in processes mainly by reducing power, for a slimmer, lighter phone and longer life. A lower power process treads water on clock rate but then allows more GPUs and other accelerator IP to be on the chip.
 
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