Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/tsmc-q3-2021-discussion.14761/page-2
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

TSMC Q3 2021 Discussion

Another important announcement is to build a 22-28nm fab in Japan. It is interesting to know that Japan is willing to take a “half-node” approach (the best Japan’s logic fab is 40 nm) and to pay 50% upfront (~3.5 Billion USD). The caveat is that the chips should supply Japan’s internal use first. With this fab, Japan could be free from auto chip shortage in the future and assure herself a spot in the EV revolution as batteries and chips are two key components.

With the conclusion of this negotiation, up next is the EU-TSMC. Will EU take a half-node like Japan or a full-node like 2nm? These negotiations can’t be taken lightly because the EU and Japan make up more than 40% of the TSMC suppliers, and most of them have no second source.
 
Another important announcement is to build a 22-28nm fab in Japan. It is interesting to know that Japan is willing to take a “half-node” approach (the best Japan’s logic fab is 40 nm) and to pay 50% upfront (~3.5 Billion USD). The caveat is that the chips should supply Japan’s internal use first. With this fab, Japan could be free from auto chip shortage in the future and assure herself a spot in the EV revolution as batteries and chips are two key components.

With the conclusion of this negotiation, up next is the EU-TSMC. Will EU take a half-node like Japan or a full-node like 2nm? These negotiations can’t be taken lightly because the EU and Japan make up more than 40% of the TSMC suppliers, and most of them have no second source.
Not sure if half-node is being used correctly in this context, care to explain? Just curious what you meant, that's all! The fab in Japan will be interesting, it seems they're looking to do a JV with Sony, I'm assuming there will be some prioritization for Sony, with word that Denso is also interested in looking to participate. Most of Sony's semi sales is in imaging sensors so I'd imagine that's why 28nm was selected...in which case, I do wonder how much of an impact it will make on Japan's automotive semiconductor supply stability by hosting the fab.

As for the 40% number, are you referring to the end customer sales proportion? I certainly don't think European and Japanese fabless companies make up 40% of TSMC's sales. I don't really see Europe getting a leading edge node fab either, even by the time TSMC's Arizona fab goes live, it won't be leading edge, nor will Samsung's new fab in the US, wherever they decide to establish it. At least American fabless companies have an overwhelming presence in the list of top 20 semiconductor manufacturers, Europe...and Japan for that matter, doesn't really have a presence on that list...and the ones that are represented on that list don't really need a leading edge process. They'll have to come up with a really good reason and throw a bunch of carrots for it to make sense for TSMC over in Europe.
 
It all comes down to scale and trust and in these areas, TSM dominates and continues to build out an ever-larger ecosystem around the world. Using leverage and compounding in every facet of their organization, TSM will with their customers increase their lead in performance, price, the pace of advancement, resource utilization, and the value of relationships. Ecosystems are everything and TSM is the master of ecosystems.
 
  • Like
Reactions: VCT
The A15 looks like a pretty decent jump in efficiency and performance over the A14, despite given the "same 5nm node" advertised: https://images.anandtech.com/doci/16983/SPECint-energy.png

As there were some IPC gains in addition to frequency (while also using less power), I assume some of that is reworking the silicon a bit (IPC), but getting higher clocks at lower power sounds like that "preview" node you are talking about.

It's refreshing to see the vendors go for better battery life over "only performance gains" in recent years..

Another topic for another time but with the rumblings of key engineers leaving Apples Semi team (some of the original PA-Semi guys IIRC) I'm curious what effect that's going to have on the next few generations of Apple processors.
I also heard that 100+ Apple IC designers, including their best ones, went to startups (AI, etc).This will certainly negatively impact near future designs=innovations.
 
Another important announcement is to build a 22-28nm fab in Japan. It is interesting to know that Japan is willing to take a “half-node” approach (the best Japan’s logic fab is 40 nm) and to pay 50% upfront (~3.5 Billion USD). The caveat is that the chips should supply Japan’s internal use first. With this fab, Japan could be free from auto chip shortage in the future and assure herself a spot in the EV revolution as batteries and chips are two key components.

With the conclusion of this negotiation, up next is the EU-TSMC. Will EU take a half-node like Japan or a full-node like 2nm? These negotiations can’t be taken lightly because the EU and Japan make up more than 40% of the TSMC suppliers, and most of them have no second source.

I think it's simple. Low node 193 immersion is terribly uneconomical because of multiple exposures, and restraining because of self-alignment trickery. On other hand the last nodes for non-immersion, and single exposure have very good yields, and productivity.
 
It's kinda funny some commentators are piling up on this. And there's a little bit of sadness that people gradually lost interest on how many months or years Intel is delaying a new product rollout. TSMC and Intel each is really working in their own universe with two very different mindsets, performance targets, and ecosystems.

Very true. In the pre FinFET days processes were released when they were ready. Delays were not as big of a deal because the media generally ignored us. And that was back when a process node was named after gate length. TSMC changed the node game with Apple and a new process variation each year. You can call it what you want but it is not the same PDK and the IP needs to be re characterized every time and that causes ripples in the ecosystem.

I can assure you Apple will be getting wafers out of the new N3 fabs next year for the iPhone 2022 launch. If they were to stay on N5 other customers would go without. Apple volumes are to big to co-mingle with the others without notice.

Hopefully conferences will be live soon so we can get the hallway discussions back on track.
 
Back
Top