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TSMC 2nm made breakthroughs, will adopt GAA technology and put into production in 2023~2024

Daniel Nenni

Admin
Staff member
For TSMC's advanced manufacturing process, 5 nanometers are currently ready to enter mass production, 3 nanometers will also be put into production at a critical moment in 2022, and more advanced 2 nanometer processes have also reported significant progress. The market estimates that 2 nanometers are expected to In the case of mass production from 2023 to 2024, it is expected to further consolidate the position of the global foundry leader.

According to the "Economic Daily" report, TSMC decided to use FinFET technology in consideration of cost and yield in the 3nm process, and after achieving global leadership, the more advanced 2nm process It is expected to cut into the surrounding gate (GAA) technology and formally enter another new process technology field, and it is expected that TSMC will announce this result in the next annual technical forum. However, TSMC has not commented on this. The report pointed out that although TSMC announced in 2019 that it will formally invest in 2nm technology research and development with hundreds of R&D teams, it has not been announced that the 2nm process node will choose to use FinFET technology or switch to GAA technology. However, according to the relevant supply chain, because FinFET technology will face a technical bottleneck from below 3 nanometers, TSMC will choose to adopt GAA technology at 2 nanometers.

In addition, because competitor Samsung has announced that it has adopted GAA technology since the 3nm process node, TSMC clearly lags behind Samsung. However, market participants pointed out that TSMC also used EUV lithography equipment later than Samsung. However, while still leading Samsung in terms of process yield, TSMC adopted a pragmatic approach of steady operation. It only took 2 nanometers to adopt GAA technology and fell to Samsung for a generation. It is expected to continue to maintain its dominant position.

According to the announcement of the front desk company, it is expected to start construction in 2021. The 12-inch plant to be set up in Arizona will be based on a 5 nanometer process and will be put into production in 2024, with a monthly capacity of 20,000 pieces. Compared with the current development plan of TSMC's advanced process, TSMC has already entered the production stage of 2nm in Taiwan, and the completion of the overall US plant will have no impact on TSMC's advanced process orders in Taiwan.

In addition, it has also been rumored recently that competitor Samsung also announced that it will abandon the 4nm process and directly invest in the 3nm process to face face to face with TSMC. Market participants also said that if TSMC really did mass-produce the 2 nanometer process of GAA technology between 2023 and 2024, Samsung would be overwhelmed by the situation of overtaking at the corner of the 3 nanometer process.

 

prime007

Member
The article indicates that Samsung is currently ahead in GAA technology....I'm curious to hear what Samsung's plans are beyond 3 nm. I know the Koreans will want an answer to this article to get their hype train going.
 

Tanj

Member
That sounds incredible. 2nm technology, Wow ! How many electrons to pass the gate when it's on ?
There is no 2nm dimension anywhere in the process, except possibly gate dielectric thickness. It has long since become just a marketing label with no meaning. You can read it as "the process after whatever the 3nm process was, which we claim to be better than what the competitor will call 3nm".
 

Daniel Nenni

Admin
Staff member
There is no 2nm dimension anywhere in the process, except possibly gate dielectric thickness. It has long since become just a marketing label with no meaning. You can read it as "the process after whatever the 3nm process was, which we claim to be better than what the competitor will call 3nm".
That is very true, process names detached from technology with the advent of FinFETs years ago. It will be interesting to see where we go after 1nm. I'm sure the marketing people will come up with something clever.

By the way, process node names are targeted at the non semiconductor professionals. The rest of us know what's inside a PDK so we can make our own decisions on what is what. Unfortunately you have to sign a SERIOUS security enforced NDA to get a PDK now so we only talk about them amongst ourselves.
 

bmussard

New member
That is very true, process names detached from technology with the advent of FinFETs years ago. It will be interesting to see where we go after 1nm. I'm sure the marketing people will come up with something clever.

By the way, process node names are targeted at the non semiconductor professionals. The rest of us know what's inside a PDK so we can make our own decisions on what is what. Unfortunately you have to sign a SERIOUS security enforced NDA to get a PDK now so we only talk about them amongst ourselves.
Thanks for clarifying this. I reckon that now it has nothing to do with channel width/length. So, in the end I understand that it is a matter of gate density only.
Regards
 
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