The Whats, Whys, and Hows of TSMC-SoIC™

[Daniel Nenni]

If you have questions this a good place to ask:

TSMC-SoIC service platform provides innovative front-end, 3D inter-chip (3D IC) stacking technologies for re-integration of chiplets partitioned from System on Chip (SoC). The resulting integrated chip outperforms the original SoC in system performance. It also affords the flexibility to integrate additional system functionalities. TSMC-SoIC service platform meets the ever-increasing compute, bandwidth and latency requirements in cloud, network and edge applications. It supports both chip on wafer (CoW) and wafer-on-wafer (WoW) schemes. The dual scheme provides superb design flexibility in mixing and matching different chip functions, sizes and technology nodes.

Like SoC, TSMC-SoIC platform is fully compatible with existing advanced packaging services such as CoWoS® and InFO, offering a powerful "3Dx3D" system-level solution. Take time to learn more about the TSMC-SoIC and how it can meet your design needs.

 

[Fred Chen]

Bigger thermal risk with shorter vertical distance. It's well-known for chiplet placement.

 

[Arthur Hanson]

Dan, I know AMAT has been critical supplier in semi technology and is their equipment key in this stacking technology and what part do they play. I seem to remember a conference call from AMAT on this, but I can't say for sure. Any elaboration on AMAT's and others role in this would be appreciated. Also I have listened to conference call from Micron and they have built a tremendous number of layers in memory, that gets ever larger as time passes. Thanks

 

[Tanj]

Yes, but is it cheap? Classic TSV adds a lot to wafer cost. Does this version bring costs down? Are they using tungsten for the TSVs, with really thin wafers?