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Regarding semiconductor process updates, it is quite brief, here is what was mentioned in that script:
1. Risk produce 11LPP and 8LPU now.
2. 7LPP risk produce second half of this year. Next year 5LPE and 4LPE risk production.
3. EUV NXE:3400 currently approaching 1000 wafers per day. Target 1500 wafers per day by 2020. (This is really slow by the way. 6000 wafers per day is a reasonable expectation for leading edge NXT tools.)
4. 3 nm move to MBC-FET (stacked surrounded gates). 0.75V is FinFET limit of supply voltage.
5. 28LPP move to 28FDS and 18FDS (FDSOI). 28FDS now and 18FDS next year. NXP first adopter, but also popular in Japan.
2. 7LPP @ H2 2018 --> That means EUV volume production in H1 '19, or am I being too optimistic?
3. That' s 40/hr right, I thought the aim with 250W source was 125/hr? Still quite far apart. Is availability (downtime, planned maintenance) maybe still a problem?
5. Nice, they' ll provide 18FDS 'next year'. NXP => Would be the i.MX 6 I'd guess?
3. That' s 40/hr right, I thought the aim with 250W source was 125/hr? Still quite far apart. Is availability (downtime, planned maintenance) maybe still a problem?
It looks like they are increasing the doses even further, to reduce the CD nonuniformity as well as to avoid stochastic missing or bridging features. They also mentioned high-sensitivity resist. Downtime still needs to be considered as well.
I suppose it makes most sense to have each tool do one BEOL layer (their VLSIT paper indicated they covered entire BEOL), so that would be ~ 30000 wafers per month, as long as all of the tools are up.
