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Root scientific causes of TSMC's leadership / Intel and Samsung's failure

BlueNode

New member
Hi all – I'm interested in the root causes or factors that account for TSMC's ability to deliver shrink after shrink, on schedule, and with excellent performance characteristics.

Conversely, what explains the apparent reality that no one else in the world is able to deliver comparable nodes in the same time frames?

I've seen bits of speculation here and there, mostly about Intel betting too big on dramatic jumps from 14nm to their 10nm (purportedly comparable to TSMC's N7, though this might only apply to the nth-generation of Intel's 10nm), while TSMC allegedly took a more iterative approach. I'm not sure what that idea logically comes down to, but it doesn't explain why Intel would struggle for so many years to mass produce performant and profitable 10nm products across laptop, desktop, and server. It also doesn't match the reality of the jumps that TSMC delivered from its 10nm to 7nm, and then to 5nm and now 3nm. These would be considered major advances by any foundry, not cautious iterations (especially in terms of density, maybe less so on performance). Nor does it explain why Samsung has struggled so much and evidently can't do what TSMC does. Or GlobalFoundries' inability to develop any FinFET nodes on its own, not even at the 14nm entry point, and canceling its promised 7nm process.

TSMC's ability to develop and mass produce cutting edge FinFET nodes at 7nm and below is apparently unique. That's surprising and scientifically interesting. Combined with Intel's protracted failure, I'm wondering what's going on here. Does TSMC have a large advantage in the R&D process? Does it have a new science of engineering management? What does TSMC do differently from Intel and Samsung? How deterministic is human engineering performance in this domain? For example, if Intel's CEO says that Intel is going to recapture its leadership position, is it actually possible to decide in advance that you're going to succeed at (TSMC-equivalent) 7, 5, and 3nm nodes and then go do it? They presumably decided to succeed at 14, 10, 7nm, etc. nodes in recent years, and yet failed (especially with their 10 and 7nm nodes). What do we know, scientifically, about this kind of R&D performance issue? What would Intel be able to do differently to achieve a different outcome? Is it a talent disparity across firms?

Samsung's case is interesting because they were at the same level as TSMC, in terms of the science and engineering of FinFET processes. Their 14nm node was denser than TSMC's 16nm. I'm not sure about performance differences, but Samsung always took shots at TSMC's node for being based on one of their 20-something nm planar nodes or something, like it wasn't a true FinFET, or at least not a clean-sheet design. TSMC pulled ahead of Samsung at 10nm, at least on density. (And Samsung's consistent extremely poor performance in SoC development is even more puzzling. Their Exynos SoCs were always dramatically worse than Apple, Qualcomm, and Arm designs. How Apple is able to design much more powerful and efficient SoCs than Qualcomm and Samsung is a related mystery. Samsung has the advantage of owning the SoC design, the process nodes, and the fabs, and yet apparently there's no discernable optimization advantage in that stack? They produced the worst chips by a wide margin. How is Apple years ahead using someone else's nodes?)

Then, TSMC never looked back. By contrast, Samsung hung around at 10nm, and is still producing large volumes of their 10nm family (Nvidia's current desktop GPUs use a Samsung "8nm" process, part of the 10nm family). Samsung has struggled to improve much beyond their 10/8nm node, with their 7/5nm process performing very poorly compared to TSMC's 7/6nm nodes, and well behind TSMC's 5nm.

Is there something happening once foundries venture beyond the roughly "14nm" FinFET processes? Intel hit a wall there. Samsung hit a wall there (their 10nm is only slightly denser than Intel's 14nm). The precipice seems to be around 50 M/mm transistor density. I think Intel's 10nm is closer to 50 M/mm in actual products than to the 90-100 M/mm they initially touted. Samsung's 8LPU might be 60 M/mm. Is there something scientifically, technologically, or economically special about venturing beyond that density? How has TSMC overcome it, and no one else?

Thanks.
 
To me it is critical mass. TSMC has the largest ecosystem of customers and partners collaborating on new process technologies. If you combine the R&D effort of the ecosystem it is trillions of dollars versus billions spent independently by Samsung and Intel. And yes trust is the cornerstone of the ecosystem. The semiconductor industry needs foundry competition but I do not see how that is going to happen with IDM foundries. I do think if Intel or Samsung bought GF that would be a giant step in the right direction. It would provide a pure play foundry front end to an IDM foundry. Not the same as TSMC but much closer to customers and partners on a business level than Intel or Samsung will ever get independently, absolutely.
 
Observing from the distance from multiple points in the ecosystem, and making some broad generalizations: It sure seemed like Intel was tweaking every aspect of their process(es) and design flow to get what the design groups insisted was necessary for future processor generations, while TSMC was focused on meeting a set of specs for the next node, next year, for a handful of key customers who were going to buy the bulk of the first year's production. Intel financed their own internal design flow; TSMC published Reference Flows based on commercial tools (financed and developed externally),
2. TSMC R&D doing 3 shifts in a day .
Yes, requests from TSMC were always waiting on email every morning. Intel worked on a weekly schedule. Rigid, but weekly.
 
@Dave.. yes, true.. that is the key difference between IDM model and foundry model. IDM (Intel) focuses exclusively on their internal customer demands while foundry model (TSMC) focuses on meeting technology specs, along with guidance from key customer partners. While so much you can do with process, equipment and litho and squeeze PPAC (power, performance, area and cost), you can also be creative on the circuit design and system architecture. This is where some serious trade-offs happen which becomes the key.
 
Ecosystem, Customer Mix, Great 24 hr R&D are all true but also TSMC is a Borg, hive culture. There is a singlemindedness beyond any company I’ve worked for. or seen. There is essentially only 1 P&L for a $50B company with a single mission in mind. You can’t create that overnight.
 
Samsungs SoC design failed, because designing a good microachitrecture is actually really hard, especially when your power buget is extremely limited.
X86 for example can just waste energy efficiency to achieve their performance metrics.

Qualcomm had to give up and recently entered again by buying ex-Apple Nuvia.
Samsung gave up. They gave up Core design and GPU. They are now using standard Arm cores and AMD GPUs for the next gen flagships.

However I believe Samsungs LSI team is also not top notch. Qualcomm is also using Samsung 8nm as is Samsung for SoCs with ARM X1 cortex microarchitectures. For some reason Qualcomms X1 implementation is better on the same node of the same Samsung fab.

This was also visible when Apple did their last dual-source with Samsung and TSMC. The Samsung chips were larger and consumed more power.

Regarding Intel. The 14nm++++++++ disaster moved engineering resources from 10nm development to multiple 14nm iteration. 14nm was delayed and for 10nm they thought, "hey lets be even more aggressive than from 22nm to 14nm, because that worked so well" I think management just completely failed Intel for the better half of the last decade.

I would like to know how much reliance on a working EUV machine, Intel and Samsung need for their nodes. TSMC actually developed their own Pellicles less EUV implementation which may be the reason they are now leading the EUV era.
 
So, Samsung, Intel and TSMC, what are inputs that may explain different outputs? Some inputs are a cost advantage, a speed advantage, and a culture advantage.
Cost: Fab process equipment sold by US and JP vendors is available to TSMC, Samsung and Intel alike. So this isn’t an explanatory factor. However, there is a Fab Facility equipment layer, the base of the pyramid, which is unique to Samsung, Intel and TSMC. And TSMC has the best and least expensive FAC equipment. Cost is 1/4, capabilities 2x. That edge is worth $2B per fab, so this isn’t small. If a fab consists of 3000 process tools, the FAC EQP is at least 10,000 as each tool requires 10-20 facilities.
Speed: TSMC can build fabs faster and better than Intel or Samsung, due to Chinese contractors who are miraculous. The Tesla China facility, and the Covid hospital construction are instructive, you can build big facilities at 10x faster speed. 10x is conservative, really.
Speed of development: I’ll keep beating the drum of FAC EQP, because it keeps making a huge difference. New nodes require new capabilities and new tools have those capabilities. If you can build a fab faster, equip it faster, you can install and reconfigure the process equipment faster, now your process people have a huge head start.

So in summary, TSMC has a flywheel where the fab is built faster by Chinese contractors, new process equipment can be brought online faster, so new nodes arrive faster. If Samsung or Intel had a fab in TW it would have these advantages (except their FAC EQP would be less advanced), and you’d likely see a convergence.
 
I have worked as a supplier to all three. There are very significant cultural differences between the 3 organizations. TSMC: thousands upon thousands of engineers and PhDs marching to the SAME drum. Their ability to achieve large scale coordination of purpose is unmatched. TSMC: wide open to new ideas, no matter how small, if they will advance the company's goals of performance and cost. I never had a problem getting a last minute appointment at TSMC fabs to discuss new ideas. True on cutting edge and true on 150 mm wafers! Intel: no air gets in. Most PhDs are picked 6 months after graduation with no industry experience as a rule. Intel: no interest in cost cutting or performance improvements if technology is "released". Intel: no older fabs generating cash to pay for everything else. Intel: focus on share buy-backs not technology. Samsung: very much like TSMC in terms of coordination but without a single focus. Making DRAM + foundry logic + own ASICS + mobile devices and have CEO in jail at same time, that's probably your explanation right there. The secret sauce: people. @benb Surely you mean Taiwanese contractors, not Chinese.
 
Maybe it’s the motor scooters, illegal in China, that explains the difference between TW fab techs and the rest of the world. You can tell a lot about a country by the mode of transit of the average citizen.

I do agree its people, that makes the difference. Most everything about a fab is commoditized except the people.
 
@benb there are plenty of electrical scooters in China. Most Taiwanese would prefer cars if they could afford them or park them. One point that does not get mentioned here: wages in Taiwan are kept low via "consultations" between the large employers. TSMC pays little (by US standards) but more than others so they get the best people.
@Daniel Nenni TSMC never had to compete with GAFA in Taiwan. TSMC may be more popular for folks already within our industry but I am not sure about at large appeal. I expect that poaching will be an important part of staffing plans.
 
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@benb there are plenty of electrical scooters in China. Most Taiwanese would prefer cars if they could afford them or park them. One point that does not get mentioned here: wages in Taiwan are kept low via "consultations" between the large employers. TSMC pays little (by US standards) but more than others so they get the best people.
@Daniel Nenni TSMC never had to compete with GAFA in Taiwan. TSMC may be more popular for folks already within our industry but I am not sure about at large appeal. I expect that poaching will be an important part of staffing plans.

TSMC pays big bonuses based on company performance so employees are well compensated during good times and these are very good times.

I have done business in Asia for many years. Business cultures are very different in China, Japan, Taiwan, and Korea. Business culture in Taiwan strikes me as a blend of Japan and China.
 
@Daniel Nenni TSMC pays well (for Taiwan) but the entire ecosystem does not (at least compared to here - I know, I am part of it). Remember that not everyone you meet inside a TSMC fab is on the TSMC payroll.

TSMC does have a unique ability to align large groups of well educated engineers and researchers but conditions unique to them (and to Taiwan in general) played a role. Those conditions do not apply here. Apple will pay whatever is needed. Same with all the others which incidentally are customers of TSMC. At the end of the day, TSMC will hire young engineers and poach from existing fabs (ON Semi, Microchip, Intel, GF, former Micron Lehi...). They will also bring a large contingent of Taiwan staff and they asked their key suppliers to do the same.

Circling back to the original question: there is nothing that fundamentally prevents Samsung or intel or GF from catching up (eventually). Key elements needed: strong culture, single focus, large scale alignment of purpose, lots of money (ideally coming from on-going nodes), large extant ecosystem (of suppliers, of service providers), lots of customers. You could rank the usual suspects and conclude that it was likely (but not pre-ordained) that TSMC would end up on top. From where we are, TSMC will sprinkle a few trailing edge factories overseas and pre-empt rivals (by hiring their staff and by keeping governments at bay).
 
@Daniel Nenni TSMC pays well (for Taiwan) but the entire ecosystem does not (at least compared to here - I know, I am part of it). Remember that not everyone you meet inside a TSMC fab is on the TSMC payroll.

How does the pay in Taiwan and the cost of living compare to China and the US? Silicon Valley does pay well but the cost of living is very high. The software boom is to blame this time. College grads are getting $150k+ many extras at Google and the likes but honestly it's hard to live on that here. Rent is sky high and home prices are about double of five years ago. Not to mention taxes and health care expenses which California leads in. My kids call this first world problems versus third world problems (no food, water, healthcare, etc...).
 
@Daniel Nenni I lived in Taiwan for a few years. Does not make me an expert by any means. Cost of living may be lower than Silicon Valley but it is higher than many places in the USA, especially when you take into account wages which are considerably lower than here on average. That stands in sharp contrast with South Korea. My friends in Taiwan are painfully aware that South Korea is much further along than they are in terms of collective wealth. You can see it in housing, in cars, in people going out, in cultural activities, Inchon airport vs Taoyuan, etc.

TSMC is a great organization that has benefited nearly everyone on the planet in one way or another. It's impact of the average well being of Taiwanese is something else altogether. South Korea has one king (Samsung) and many princes. Taiwan has one ruler, everyone else eats dirt. That keeps the industry very competitive.
 
One thing I can tell you is that listings in our jobs section tell a story. We list jobs for TSMC, Intel and GF. TSMC jobs in AZ are getting 2X-3X the hits of Intel and GF. TSMC employees are rock stars in Taiwan and it will be the same in the US, absolutely.
Great observation. thanks
 
There’s one other cultural thing that hasn’t been mentioned, 996. Samsung and TSMC have a 996 culture, like much of Asia, meaning you work from 9 to 9 for 6 days a week. That is true at Samsung in the USA, for expats only. I wonder if 996 will be required for non-Asians at TSMC in AZ.
 
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