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Intel taping out 18A

tooLongInEDA said:
Don't think I'm disagreeing about the benefit and discipline of working with Qualcomm. I'm merely observing that an external customer appears to be necessary - in my experience it often is. But perhaps Qualcomm has a more immediate market need for 18A than the internal designs.
Click to expand...

18A is a node for Intel Foundry so of course an external customer is necessary. Chiplets are great for the fabs, easier to yield and manufacture than monolithic chips. The hard part is assembling all of those chiplets and packaging them up and making them work. Again, Intel is doing this mostly alone. TSMC is building a chiplet ecosystem with dozens of companies. The TSMC ecosystem is like the semiconductor version of Disneyland. It really is the happiest semiconductor design place on earth!
 
Daniel Nenni said:
18A is a node for Intel Foundry so of course an external customer is necessary. Chiplets are great for the fabs, easier to yield and manufacture than monolithic chips. The hard part is assembling all of those chiplets and packaging them up and making them work. Again, Intel is doing this mostly alone. TSMC is building a chiplet ecosystem with dozens of companies. The TSMC ecosystem is like the semiconductor version of Disneyland. It really is the happiest semiconductor design place on earth!
Click to expand...
At least they talked about a chiplet ecosystem a year ago:

www.intel.com

Fostering a Chiplet Ecosystem for the Future of Moore’s Law

The next step is an open chiplet ecosystem and ubiquitous interconnect at the package level.
www.intel.com www.intel.com

Are you saying it's mostly talk, not much action? Or that UCIe is not as successful as the consortium list implies? Or that Intel is behind in getting external chiplet IP on to their process? All of the above?

It is no surprise IFS is behind TSMC, even in UCIe support. Too late to the foundry party.
 
blueone said:
At least they talked about a chiplet ecosystem a year ago:
www.intel.com

Fostering a Chiplet Ecosystem for the Future of Moore’s Law

The next step is an open chiplet ecosystem and ubiquitous interconnect at the package level.
www.intel.com www.intel.com
Are you saying it's mostly talk, not much action? Or that UCIe is not as successful as the consortium list implies? Or that Intel is behind in getting external chiplet IP on to their process? All of the above?
It is no surprise IFS is behind TSMC, even in UCIe support. Too late to the foundry party.
Click to expand...

UCIe is just one part of a very complicated ecosystem. I mentioned this in a previous bog:

As to when the commercial chiplet ecosystem will be ready a laundry list of technical challenges were discussed which included: die to die communication, die interoperability, bumping, access to packaging and assembly houses, firmware, software, known good dies, system test and test coverage, EDA and simulation tools to cover multi-physics (electrical, thermal, mechanical). More importantly these different groups or different companies will have to work together in a whole new chiplet way.

semiwiki.com

Chiplets, is now their time? - Semiwiki

[caption id=
semiwiki.com semiwiki.com

And last week I did a chiplet panel at the Synopsys User Group Meeting which I will write up this week. AMD, TSMC, ARM, Ansys, MBZ, and Synopsys were on the panel. There is also a new report from MIT Technology Review and Synopsys (attached).

We are just scratching the chiplet surface here. The complete opposite of a slam dunk.
 

Attachments

  • MIT Report FINAL_March 22_1030PST.pdf
    597.2 KB · Views: 96
VCT said:
Do you mean it's a advantage or disadvantage for Intel? Thank you.
Click to expand...

As I said manufacturing chiplets will help Intel with yield learning and process delivery. Packaging up chiplets will be a learning curve for all. Intel is doing their own chiplet designs while TSMC is working with dozens of customers, partners, and suppliers on chiplet designs. In fact, TSMC has been doing mutli die designs for more than 10 years so this is not new. Intel has also done multi die with FPGAs so that is a start.

Bottomline: it's all about the ecosystem. Intel is working hard on their ecosystem for sure but it takes time so I don't think comparing the Intel ecosystem to TSMC's 15+ year ecosystem effort is fair. On the other hand Intel is very competitive against the other foundries and I would already put them ahead in the chiplet ecosystem world, absolutely.
 
Daniel Nenni said:
As I said manufacturing chiplets will help Intel with yield learning and process delivery. Packaging up chiplets will be a learning curve for all. Intel is doing their own chiplet designs while TSMC is working with dozens of customers, partners, and suppliers on chiplet designs. In fact, TSMC has been doing mutli die designs for more than 10 years so this is not new. Intel has also done multi die with FPGAs so that is a start.

Bottomline: it's all about the ecosystem. Intel is working hard on their ecosystem for sure but it takes time so I don't think comparing the Intel ecosystem to TSMC's 15+ year ecosystem effort is fair. On the other hand Intel is very competitive against the other foundries and I would already put them ahead in the chiplet ecosystem world, absolutely.
Click to expand...
Samsung have DRAM and foundry. Does that give Samsung advantage doing SoC and chiplets?
 
I don't understand why the SIPs (interposers) need to be handled by the big 3-5 foundries. It seems to me that the packaging of the chiplets is an independent function whereby the chiplets come from different foundries. I assume that Skywater is focusing on the interposer and SIPs. Is that how you see it? Are there other smaller foundries or packaging companies focused on this? A 180nm process is even overkill for the interposer. I don't feel comfortable with 100% relying on the major foundries as the supplier of the packages.
 
The fact that Intel is not using their own Intel 3 node for their Battlemage GPUs, tells me that Intel 3 is not quite ready in 2024. Battlemage is due to launch in 2024 and uses TSMC 4nm. The only explanation is either yields are too low, or there aren't enough EUV machines to produce enough chips for both Granite Rapids and Battlemage.
 
lefty said:
The fact that Intel is not using their own Intel 3 node for their Battlemage GPUs, tells me that Intel 3 is not quite ready in 2024. Battlemage is due to launch in 2024 and uses TSMC 4nm. The only explanation is either yields are too low, or there aren't enough EUV machines to produce enough chips for both Granite Rapids and Battlemage.
Click to expand...
Intel states that Intel 4 was manufacturing ready in December 2022. First product will be seen in public in Dec 2023 (maybe?). Intel is correctly choosing to use TSMC for a lot of different products....
 
Daniel Nenni said:
The implication is what you want it to mean? Or you can just ask me.

The implication is that 18A is a full chip process and QCOM is a full chip company that has mastered the multi source foundry strategy. Who better to partner with on 18A?
Click to expand...
Daniel: Qualcomm must have parallel efforts with multiple foundries right? So if Intel doesn't deliver, they just increase loadings on to TSMC or Samsung? correct?
 
MKWVentures said:
Intel states that Intel 4 was manufacturing ready in December 2022. First product will be seen in public in Dec 2023 (maybe?). Intel is correctly choosing to use TSMC for a lot of different products....
Click to expand...
When Intel says "manufacturing ready", that's the same as when TSMC say "risk production", right?
 
lefty said:
When Intel says "manufacturing ready", that's the same as when TSMC say "risk production", right?
Click to expand...
probably... but its mostly just PR in both cases. IMO All that matters is when real chips get into real devices. There is a criteria for manufacturing ready but, it is 99% PR for all companies right now. BTW there is a HUGE accounting reason on risk production and manufacturing ready but again the announcements in the press or at IEDM or ISSCC are mostly PR (IMHO)
 
MKWVentures said:
Daniel: Qualcomm must have parallel efforts with multiple foundries right? So if Intel doesn't deliver, they just increase loadings on to TSMC or Samsung? correct?
Click to expand...
My understanding is that Qualcomm prefers TSM but it's multi foundry strategy is an important negotiating tool for them.
 
MKWVentures said:
Daniel: Qualcomm must have parallel efforts with multiple foundries right? So if Intel doesn't deliver, they just increase loadings on to TSMC or Samsung? correct?
Click to expand...

Yes. QCOM is still with TSMC and Samsung. Mostly TSMC though. QCOM has always had a multi foundry strategy since wafer price is very important to them.
 
lefty said:
The fact that Intel is not using their own Intel 3 node for their Battlemage GPUs, tells me that Intel 3 is not quite ready in 2024. Battlemage is due to launch in 2024 and uses TSMC 4nm. The only explanation is either yields are too low, or there aren't enough EUV machines to produce enough chips for both Granite Rapids and Battlemage.
Click to expand...

How is this a fact? Do you have a public reference? I have also heard the GPUs will be at TSMC but I have not seen Intel confirm it publicly. It was always the plan from what I was told so it has nothing to do with yield.
 
Daniel Nenni said:
How is this a fact? Do you have a public reference? I have also heard the GPUs will be at TSMC but I have not seen Intel confirm it publicly. It was always the plan from what I was told so it has nothing to do with yield.
Click to expand...
It's a rumour: https://hothardware.com/news/intel-battlemage-tipped-for-beastly-core-upgrade-and-over-3ghz
yeah, "it was always the plan" because they knew Intel 3 wouldn't be ready in 2024 (at least not in enough capacity). It makes no sense to spend billions on a node and then not use it.
 
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lefty said:
It's a rumour: https://hothardware.com/news/intel-battlemage-tipped-for-beastly-core-upgrade-and-over-3ghz
yeah, "it was always the plan" because they knew Intel 3 wouldn't be ready in 2024 (at least not in enough capacity). It makes no sense to spend billions on a node and then not use it.
Click to expand...
So you expect that MTL and intel 3 Xeons are even lower volume than ARC GPUs? Additionally a new client, a new xeon generation, and a $4B foundry deal don’t sound like intel is "not using the node" to me. Unless you are insinuating that D1 is lying to CCG that intel 4 would be ready for product launches in 2023, lying to DCAI that intel 3 would be ready for product launches in 2024, but for some reason honest with AXG that it wouldn't be ready until after 2024.
 
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