Hynix ISPR keynote
- Thread starter Paul2
- Start date
The memory companies probably have the best monolithic 3D people in the industry.
I wonder how long it will be for them to take on general computing companies.
Compute in memory HBM can alone allow for a few generation leap for GPUs in its first version.
If monolithic 3D DRAM will deliver the same density boost as we seen in flash, then we will get hundredfold increase in RAM sizes.
Mono SRAM can crack the SRAM scaling barrier for a few generations.
And monolithic 3D CMOS will be so momentous, any predictions are out of the window.
I wonder how long it will be for them to take on general computing companies.
Compute in memory HBM can alone allow for a few generation leap for GPUs in its first version.
If monolithic 3D DRAM will deliver the same density boost as we seen in flash, then we will get hundredfold increase in RAM sizes.
Mono SRAM can crack the SRAM scaling barrier for a few generations.
And monolithic 3D CMOS will be so momentous, any predictions are out of the window.
It looks they are still evaluating the process; the doses are already very high, much higher than what ASML uses to report throughput.
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The feature is hexagonally arranged, so can actually be produced with 2 rounds of spacer patterning from a 120 nm x 210 nm starting array (technique already practiced by Samsung for a while). An older immersion tool may suffice.
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