[content] => 
    [params] => Array
            [0] => /forum/index.php?threads/hiring-physical-design-engineers-for-san-jose-ca.12517/

    [addOns] => Array
            [DL6/MLTP] => 13
            [Hampel/JobRunner] => 1030170
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000670
            [ThemeHouse/XPress] => 1010394
            [XF] => 2011072
            [XFI] => 1030270

    [wordpress] => /var/www/html

Hiring Physical Design Engineers for San Jose, CA

Hi Folks,

Please go through the below job description and If you are qualified, available, planning to make a job change and have the required skills/qualifications and interest Kindly reply to me with your updated word format resume.

About Eximius: Eximius Design is an engineering services company focused on ASIC design, FPGA design, Systems and Software engineering. We are a unique team of engineers that has developed a wide variety of innovative products over the past 25+ years.

Seniority Level: Mid-Senior level
Industry: Semiconductors
Employment Type: Fulltime with Eximius and/or Contract(1099/CTC)
Job Area: Engineering – Hardware

Job Description:
Must possess at least 8 years' experience of hands-on physical design

- Strong experience in block/full chip level floor-planning, placement techniques, power grid design, and clock tree design
- Strong experience in STA and multi-mode, multi-scenario environments
- Expertise in EDA Tool Experience: > DC/DCT, RC/Genus, ICC/ICC2, Encounter/Innovus, PrimeTime-SI, StarXT, ICV, Conformal LEC, Redhawk
- Expertise in DRC-LVS closure with ICV or Calibre. (16nm experience is a plus ).
- Deep knowledge/understanding of physical effects in DSM technologies (28nm,16nm and below)
- Excellent knowledge of the complete RTL to GDS design flow for hierarchical designs.
- Good understanding of Reliability verification checks EM, IR, etc.
- Proficiency in at least one of these scripting languages: Perl, TCL, Python.
- Low power flow (power gating, multi-VT, voltage islands, dynamic voltage scaling, body biasing, etc.
- Synthesis flow with involvement in multiple tape-outs.