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HANUMAN of verification team!

While Moore’s law continues to guide innovation and complexity in semiconductors, there are other factors that are further accelerating it. From iPod to iPhone5 via iPad, Apple has redefined the dynamics of this industry. New product launches include one from Apple every year, equally competitive and multiple products from other players and from Chinese cell phone makers every 3 months. There is an ever increasing demand of adding multiple functions to the SoCs while getting it right the 'first time' in 'limited time'. IP and sub system reuse has controlled the design lag of these SoCs significantly. While IP is assumed to be pre-verified at block level, the total time required to verify the SoC still is significant. A lot of this attributed to –

- Need for a staged approach to verify integration of the IPs on SoC
- Need to run concurrency tests, performance tests and use case scenarios
- Prolonged simulation time due to large design size
- Deploying multiple techniques to converge on verification closure
- Extended debug due to test bench complexity, test case complexity and all of the above

These challenges coupled with Murphy’s law conspire to pose a question on the verification schedule that claims a significant portion of the SoC design cycle. In the blog post Failure and Rescue, the author points to an interesting fact, “things can and will go wrong. Yet some have a better capacity to prepare for the possibility, to limit the damage, and to sometimes even retrieve success from failure”. This directly applies to SoC verification too. Verification leads and managers are expected to build teams and ensure that the tools and processes deployed will diminish perceived risks while reduce unforeseen ones. The process involves bringing in engineers, tools and processes that match the project requirements. For effective management and resiliency, one needs HANUMAN to bring in balance to execution amidst uncertainty.

Who is Hanuman? HANUMAN is a Hindu deity, an ardent devotee of Lord Rama. With the commencement of festive season in India, number of mythological stories gain prominence. Hanuman is a central character in the Indian epic Ramayana, and also finds mentions in several other texts. He is also referred to as ‘Sankat Mochan’ i.e. SAVIOR who helped Lord Rama in precarious circumstances during the fight against evil. Last season, we correlated these epics with Verification here.

So where does HANUMAN find relevance in Verification?

SoCs today cannot be verified just with a team of verification engineers and a simulator. The process demands much more viz

- Meticulous planning on what to verify, how to verify, who will verify what and when we are done.
- Architecting the verification infrastructure to address verification plan development & tracking, test scenario generation, VIP sourcing and integration, assertion identification, coverage collection, power aware simulations, acceleration or emulation, regression management and automated triaging.
- Engineers, who can use the infrastructure efficiently, are experts in protocols and methodology, strong with problem solving and debugging.

Handling complexity amidst dubiety demands a RESCUER i.e. HANUMAN. The stakes are high and so are the challenges. Multiple intricate situations arise during the course of verification to decelerate the schedule. The RECOVERER from such situations can be an engineer, a tool or a methodology and that entity at that instance is a manifestation of HANUMAN.

Sit and recall your past projects...
...if you delivered in such situations, feel proud to be one
...if you identify someone who did it, acknowledge one
...if you haven't till now then be one!

May these avatars of HANUMAN continue to drive your silicon ‘right the first time and every time’.

Happy Dussehra!

Gaurav Jalan | Connect with me
 
While Moore’s law continues to guide innovation and complexity in semiconductors, there are other factors that are further accelerating it. From iPod to iPhone5 via iPad, Apple has redefined the dynamics of this industry. New product launches include one from Apple every year, equally competitive and multiple products from other players and from Chinese cell phone makers every 3 months. There is an ever increasing demand of adding multiple functions to the SoCs while getting it right the 'first time' in 'limited time'. IP and sub system reuse has controlled the design lag of these SoCs significantly. While IP is assumed to be pre-verified at block level, the total time required to verify the SoC still is significant. A lot of this attributed to –

- Need for a staged approach to verify integration of the IPs on SoC
- Need to run concurrency tests, performance tests and use case scenarios
- Prolonged simulation time due to large design size
- Deploying multiple techniques to converge on verification closure
- Extended debug due to test bench complexity, test case complexity and all of the above

These challenges coupled with Murphy’s law conspire to pose a question on the verification schedule that claims a significant portion of the SoC design cycle. In the blog post Failure and Rescue, the author points to an interesting fact, “things can and will go wrong. Yet some have a better capacity to prepare for the possibility, to limit the damage, and to sometimes even retrieve success from failure”. This directly applies to SoC verification too. Verification leads and managers are expected to build teams and ensure that the tools and processes deployed will diminish perceived risks while reduce unforeseen ones. The process involves bringing in engineers, tools and processes that match the project requirements. For effective management and resiliency, one needs HANUMAN to bring in balance to execution amidst uncertainty.

Who is Hanuman? HANUMAN is a Hindu deity, an ardent devotee of Lord Rama. With the commencement of festive season in India, number of mythological stories gain prominence. Hanuman is a central character in the Indian epic Ramayana, and also finds mentions in several other texts. He is also referred to as ‘Sankat Mochan’ i.e. SAVIOR who helped Lord Rama in precarious circumstances during the fight against evil. Last season, we correlated these epics with Verification here.

So where does HANUMAN find relevance in Verification?

SoCs today cannot be verified just with a team of verification engineers and a simulator. The process demands much more viz

- Meticulous planning on what to verify, how to verify, who will verify what and when we are done.
- Architecting the verification infrastructure to address verification plan development & tracking, test scenario generation, VIP sourcing and integration, assertion identification, coverage collection, power aware simulations, acceleration or emulation, regression management and automated triaging.
- Engineers, who can use the infrastructure efficiently, are experts in protocols and methodology, strong with problem solving and debugging.

Handling complexity amidst dubiety demands a RESCUER i.e. HANUMAN. The stakes are high and so are the challenges. Multiple intricate situations arise during the course of verification to decelerate the schedule. The RECOVERER from such situations can be an engineer, a tool or a methodology and that entity at that instance is a manifestation of HANUMAN.

Sit and recall your past projects...
...if you delivered in such situations, feel proud to be one
...if you identify someone who did it, acknowledge one
...if you haven't till now then be one!

May these avatars of HANUMAN continue to drive your silicon ‘right the first time and every time’.

Happy Dussehra!

Gaurav Jalan | Connect with me

One such "Hanuman" is the use of FPGA platforms to enable IP/subsystem level validation and SoC level validation along with enabling SW development teams. Once the initial hurdle of justifying the investment (in terms of dollars and hours) is taken care of, FPGA platforms can really accelerate and enable the SoC development cycle (especially derivative chips targeted at adjacent markets etc.). The key to this Hanuman being a true savior is willingness to invest in FPGA based resources with long term objectives of accelerating verification, enabling SW development early in the cycle and use of these systems to showcase the development vehicles to customers with real interface devices (flash drive, MIPI Display, sensors) working at prototype level.
 
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