Keynote to focus on Artificial Intelligence & Machine Learning
Gainesville, FL – December 8, 2021 - The advance program is now available for the 2022 Design and Verification Conference and Exhibition United States (DVCon U.S.), sponsored by Accellera Systems Initiative. The virtual conference and exhibition will be held February 28-March 3, 2022.
“We have an exciting technical program in store for attendees,” stated John Dickol, DVCon U.S. 2022 Program Chair. “This year we added another layer to our already rigorous paper review process, helping to ensure attendees receive the quality program they’ve come to expect from DVCon. Attendees can look forward to sessions covering low power, RISC-V, UVM, machine learning, Portable Stimulus, functional safety and much more. In addition to 42 paper presentations, we’ll have 15 poster presentations, two panels, four tutorials and 11 workshops throughout the four-day program.”
The keynote for the 2022 program, “Unleashing AI/ML for Faster Verification Closure,” will be presented by Manish Pandey, Vice President of Engineering, Synopsys on Tuesday, March 1 at 1:00pm. The keynote will explore how exploiting supervised, unsupervised and reinforcement learning has enabled an order of magnitude gains in closure convergence and verification cycle reduction.
Two panels will be offered on Tuesday, March 2. The first panel, “The Meeting of the SoC Verification Hidden Dragons,” will begin at 8:30 am and the second panel, “Going Faster - How to Cope with Shrinking Schedules and Increasing Complexity,” will begin at noon.
Registration is open. Advance registration rates are available through January 7, 2022. Registration for the keynote, panels and exhibits-only is free.
For the latest updates regarding the conference and expo, please visit the website.
About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit here. Follow DVCon on Facebook, LinkedIn or @dvcon_us on Twitter or to comment, please use #dvcon_us.
Barbara Benjamin
HighPointe Communications
(503) 209-2323
www.hipcom.com