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Avery Design Systems Announces Verification Support for New UCIe standard, Accelerating Adoption of Chiplet Interconnect Protocol

Daniel Nenni

Admin
Staff member
Tewksbury, MA – June 15, 2022 – Avery Design Systems, a leader in functional verification solutions, today announced comprehensive support for the new UCIe (Universal Chiplet Interconnect Express) standard, providing an efficient approach to enable design and verification engineers to leverage the recently-introduced standard for die-to-die interface connectivity. Avery’s offering includes high-quality models and test suites that support pre-silicon verification of systems using UCIe.

To view the full announcement, including downloadable images, bios, and more, click here.

News Release Takeaways








About Avery Design Systems
Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential backtracing; and robust core-through-chip-level Verification IP for PCI Express, CXL, UCIe, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.

Christopher Browy
cbrowy@avery-design.com
(978) 851-3627
Avery Design Systems

Source: Avery Design Systems
Distributed by Reportable, Inc.
 
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