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Do wafer costs decline as a node matures?

Tanj

Well-known member
I recall a couple of years back Intel claiming price per transistor was still declining because the pricing curves showing most recent nodes at high prices were simply showing the premium of being new. When the node was in full production and no longer leading edge, the price would go down to take its rightful place place on a decreasing cost per transistor.

Is that still true? For example, does a TSMC N7 wafer cost the same today as it did back when it was the leading edge? Will an N3 wafer cost the same in 2024 as it does today?
 
This is like asking what will the price of bread be next year, the correct answer is, it depends.

The electronics industry is still growing steadily, and this drives a virtuous cycle of more chips, greater economies of scale, and lower per chip prices.

But, short-term, prices rise as new fabs are built, fab construction and equipment costs rise, materials and labor rise. That is happening too, and it matters more over the first 10-15 years, say, of the life of the fab.

After 15 years it is virtually certain that the wafer cost for TSMC N7 wafer, everything else being held constant, will be less. Probably radically less. This is a juicy cost cliff.

Owning fabs does deliver benefits, eventually.
 
I'll restate the question to something more tractable:

Have wafer costs declined as a node matures?​

I'm especially interested in whether there is a wafer cost reduction within 5 years of a node reaching production. That is what Intel described in the past, though of course they were talking about what it cost them internally, not necessarily what it costs for customers of independent fabs.
 
Node cost has to be lower by the 5 year point in Intel's financial engineering model because by then it will be producing ~$50 chipsets rather than ~$500 i9s. So the cost needs to fall by about a factor of 10.

Intel achieves this, in my guestimate, by having high costs built into the leading edge chip price, which gives them lots of fat to work with.

Foundries can't take this approach, the leading Qualcomm chip each year is ~$50.

Foundries have the compensation that their costs can be spread out over 10-15 years, which in the end is more attractive than the cost waterfall Intel surfs.
 
Node cost has to be lower by the 5 year point in Intel's financial engineering model because by then it will be producing ~$50 chipsets rather than ~$500 i9s. So the cost needs to fall by about a factor of 10.

Yield typically improves over time, so cost per known good die decline. Depreciation costs also decline. However, the variable cost to run a wafer (net of yield improvements and lower depreciation of fixed costs) don't decline notably.
 
The amount of power consumption alone of these latest EUV machines,means the cost of advanced node unlikely to become cheaper over time
 
The amount of power consumption alone of these latest EUV machines,means the cost of advanced node unlikely to become cheaper over time
I can't imagine that the electricity bill for a dozen EUV tools trumps the price of almost any other cost in the fab. I can almost guarantee that the prices for the chems are far greater. Almost all of the financial pain from adopting EUV tools is the high cost per unit and low throughput per unit. The electricity bill is a tertiary concern behind upfront cost and changing you mask and photoresist infrastructure/suppliers. It is also worth noting that for every EUV tool there are dozens of metrology, dry etch, wet etch, CMP, implantation, deposition, and DUV tools. To say nothing of the ovens, photoresist coaters/bakers, automation systems, and the clean room/subfab itself. EUV tools are the cool sexy thing (for good reason) but people must realize they are the world's heaviest paper weights without the rest of the fab/equipment vendor ecosystem.
 
One of the things that declines as a node matures is the frequency of interventions in the process to correct some issue. It's a bit tough to characterize this other than to say, it's costly when you have to intervene a lot; costly to lost production capacity, costly to increase in PMs and flushes and purges which are part of the intervention (and consume material in excess of the baseline), and costly to people (which I'll discuss next).

People costs are high in a new fab. It is grueling to ramp up a new technology in a new fab. Yields can start out at close to zero, and stay there for a long time, which generates overwhelming pressure to fix this obvious but often very nebulous problem. Dealing with the people costs is what separates TSMC from Samsung and Intel; I don't think Intel or Samsung do it very well, while TSMC clearly does.
 
One of the things that declines as a node matures is the frequency of interventions in the process to correct some issue. It's a bit tough to characterize this other than to say, it's costly when you have to intervene a lot; costly to lost production capacity, costly to increase in PMs and flushes and purges which are part of the intervention (and consume material in excess of the baseline), and costly to people (which I'll discuss next).

People costs are high in a new fab. It is grueling to ramp up a new technology in a new fab. Yields can start out at close to zero, and stay there for a long time, which generates overwhelming pressure to fix this obvious but often very nebulous problem. Dealing with the people costs is what separates TSMC from Samsung and Intel; I don't think Intel or Samsung do it very well, while TSMC clearly does.
To some degree this seems to be true (it seems like TSMC has less churn than the other leading edge folks), but this is just what it looks like to a TSMC outsider. I don't know if it is necessarily good though. The Taiwanese pHD student I worked for while doing some undergraduate research for the biorenewable synthesis of industrial chemicals was studying in the USA specifically so he could get a job here; away from TSMC/the semiconductor industry (and the bad work life balance/culture they had there). I wouldn't take it to the bank, as it is just one person's thought, however I don't think it is unreasonable that TSMC puts more strain on it's workers than say P&G, 3M, or Dupont. If this is an issue, than TSMC needs to fix it if they want to attract talent for new fabs in Japan and the USA (because unlike in Taiwan skilled technicians, chemist, and engineers have many non TSMC employer options). And I don't think you can totally rely on shipping in talent from Taiwan.
 
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I can't imagine that the electricity bill for a dozen EUV tools trumps the price of almost any other cost in the fab. I can almost guarantee that the prices for the chems are far greater. Almost all of the financial pain from adopting EUV tools is the high cost per unit and low throughput per unit. The electricity bill is a tertiary concern behind upfront cost and changing you mask and photoresist infrastructure/suppliers. It is also worth noting that for every EUV tool there are dozens of metrology, dry etch, wet etch, CMP, implantation, deposition, and DUV tools. To say nothing of the ovens, photoresist coaters/bakers, automation systems, and the clean room/subfab itself. EUV tools are the cool sexy thing (for good reason) but people must realize they are the world's heaviest paper weights without the rest of the fab/equipment vendor ecosystem.
The required EUV dose increases with advancing node, due to stochastics of smaller features, including cuts. That means more Joules (energy) per wafer. EUV now in some cases requires multi-patterning comparable to DUV (4 masks).

The EUV energy consumption is easily an order of magnitude above DUV:

EUV vs DUV power consumption.jpg
 
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The required EUV dose increases with advancing node, due to stochastics of smaller features, including cuts. That means more Joules (energy) per wafer. EUV now in some cases requires multi-patterning comparable to DUV (4 masks).

The EUV energy consumption is easily an order of magnitude above DUV:

View attachment 916
I think you misunderstand me. I am not denying that EUV tools burn energy like crazy, or saying that they are efficient. Rather I am saying that in the grand scheme of things EUV electricity costs have little impact on the price per wafer. If someone had a cost breakdown that proves the contrary; then I'm wrong. But until then it is just unfathomable to believe that EUV energy usage trumps depreciation, chems cost, loan interest, or even blank wafer costs.
 
To some degree this seems to be true (it seems like TSMC has less churn than the other leading edge folks), but this is just what it looks like to a TSMC outsider. I don't know if it is necessarily good though. The Taiwanese pHD student I worked for while doing some undergraduate research for the biorenewable synthesis of industrial chemicals was studying in the USA specifically so he could get a job here; away from TSMC/the semiconductor industry (and the bad work life balance/culture they had there). I wouldn't take it to the bank, as it is just one person's thought, however I don't think it is unreasonable that TSMC puts more strain on it's workers than say P&G, 3M, or Dupont. If this is an issue, than TSMC needs to fix it if they want to attract talent for new fabs in Japan and the USA (because unlike in Taiwan skilled technicians, chemist, and engineers have many non TSMC employer options). And I don't think you can totally rely on shipping in talent from Taiwan.
Fabs heavily hire from ex-military. This is part of the reason, I think, fabs migrated to Asia: Korea and Taiwan both have mandatory military service, to this day (I think). So there is a lot of ex-military to recruit for fabs.

The days of cushy software-tech jobs may be coming to an end:
 
I think you misunderstand me. I am not denying that EUV tools burn energy like crazy, or saying that they are efficient. Rather I am saying that in the grand scheme of things EUV electricity costs have little impact on the price per wafer. If someone had a cost breakdown that proves the contrary; then I'm wrong. But until then it is just unfathomable to believe that EUV energy usage trumps depreciation, chems cost, loan interest, or even blank wafer costs.
The wafer price would be directly impacted by the number of process steps, would you agree? Since there is material usage associated with each step, as well as the energy consumption.

Despite the use of EUV, the process steps for smaller nodes continue to increase.
 
The wafer price would be directly impacted by the number of process steps, would you agree? Since there is material usage associated with each step, as well as the energy consumption.

Despite the use of EUV, the process steps for smaller nodes continue to increase.
Some quick napkin math:
Per your energy numbers and the avg electrical price in Phoenix AZ ($0.14/kWh) a 3400B (with 100% utilization/up time) costs $1.7 mil per year to power. Per wafer that is $1.83 per exposure. Let's say we have 12 EUV layers total with 2 of them being double patterned for 14 total exposures. That comes out to $25.64 per wafer. TSMC is selling this wafer for well over $10k a pop. Even if the total cost is only $6k we are talking about 0.4% of the cost.

Compared to the lease payments and deprecation on said EUV tool. To say nothing of the hundreds (probably breaking into the thousands) of non EUV tools (vs the couple dozen EUV tools per fab), overpriced spare parts (because fab tools have nowhere near 100% uptime), electronics grade chems, toxic waste and ultrapure water purification (plus the massive amount of heat/chemicals/electricity to purify it). Heck even the cost per blank wafer is likely around an order of magnitude more expensive than the EUV electricity bill.
 
Fabs heavily hire from ex-military. This is part of the reason, I think, fabs migrated to Asia: Korea and Taiwan both have mandatory military service, to this day (I think). So there is a lot of ex-military to recruit for fabs.

The days of cushy software-tech jobs may be coming to an end:
While subjective, I can second the ex military thing (mostly for technicians). As for cushy comp sci jobs, I wasn't really talking about that. Rather that it would be hard for me to convince many of my college compatriots to enter the semi industry when their perceptions would be that a job at say DuPont will make better use of their knowledge, likely pay better than say TSMC, and not require as many hours/be less stressful. There is also the problem of awareness, at least to the chemical engineers I have talked to, the majority of them were shocked that the semiconductor industry hires lots of non electrical engineers/programmers.
 
Some quick napkin math:
Per your energy numbers and the avg electrical price in Phoenix AZ ($0.14/kWh) a 3400B (with 100% utilization/up time) costs $1.7 mil per year to power. Per wafer that is $1.83 per exposure. Let's say we have 12 EUV layers total with 2 of them being double patterned for 14 total exposures. That comes out to $25.64 per wafer. TSMC is selling this wafer for well over $10k a pop. Even if the total cost is only $6k we are talking about 0.4% of the cost.

Compared to the lease payments and deprecation on said EUV tool. To say nothing of the hundreds (probably breaking into the thousands) of non EUV tools (vs the couple dozen EUV tools per fab), overpriced spare parts (because fab tools have nowhere near 100% uptime), electronics grade chems, toxic waste and ultrapure water purification (plus the massive amount of heat/chemicals/electricity to purify it). Heck even the cost per blank wafer is likely around an order of magnitude more expensive than the EUV electricity bill.
Yes, even though EUV usage increased energy consumption per wafer, the resulting power bill does not explain a significant change in wafer cost. There are more cost components, some from more process steps. But the original question of wafer price decline over time is already muddled by foundry announced price hikes.
 
There are more cost components, some from more process steps. But the original question of wafer price decline over time is already muddled by foundry announced price hikes.

"Cost" and "Price" are two entirely different things. Price is always based on the balance of supply and demand - those price hikes are largely due to demand being higher than supply. Cost, however, is much more predictable. Depreciation is the biggest factor for cost per wafer, but even as depreciation is being written off (typically in a straight line bases over useful life), as the process matures, yield increases (sometimes very significantly), so cost per KGD drops. However, as I noted above, if we take depreciation and yield improvements out of the equation (focus only on variable costs - same as marginal costs), I don't think those drop notably as the process matures.

Viewed from a different perspective, the costs for taking an IC into production are heavily weighted to fixed costs versus variable costs. Therefore, the goal for a company fabricating ICs is to keep capacity utilization high (divide fixed costs over the maximum number of wafers). That is why prices (and margins) decline sharply when we operate with excess capacity.
 
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