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  1. D

    Japan's Rapidus beckons global semiconductor talents, TSMC must prevent brain drain

    To me IBM 2nm is still a step ahead of the commercial NS processes shown so far, since it has the isolation layer under the bottom gate.
  2. D

    Japan's Rapidus beckons global semiconductor talents, TSMC must prevent brain drain

    More likely the nanosheet process https://research.ibm.com/blog/2-nm-chip
  3. D

    Apple’s New M1 Ultra Packs a Revolutionary GPU

    If two dies use a CoWoS interposer, it would have to be two-exposure; more likely that they use a silicon bridge, INFO_LSI/CoWoS-L. https://www.techinsights.com/blog/apple-joins-3d-fabric-portfolio-m1-ultra
  4. D

    Intel moves EUV litho track and scanner from Oregon to Ireland

    Agreed - how far is Intel down the delivery list?
  5. D

    Intel moves EUV litho track and scanner from Oregon to Ireland

    Could it be to give the guys in Leixlip a year or two running EUV before the production systems are installed?
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