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Search results

  1. F

    Intel newest Rocket Lake CPUs performance issues

    Good question. Here is a recent article where 10nm yield is estimated: https://www.anandtech.com/show/16539/intel-ice-lake-xeon-scalable-shipments-to-date-30-customers-100k-units
  2. F

    Low yields driving calls for EUV pellicles

    This might be relevant supplementary information: https://bits-chips.nl/artikel/asml-readies-next-gen-euv-pellicle-for-production/ At the time of that article (Oct 2020), the one-way transmission was still 83%. That was with polysilicon; by going to the silicide they are getting to 90%. They...
  3. F

    Low yields driving calls for EUV pellicles

    ~90% transmission (single-pass) results in ~20% effective power loss, so they're still targeting higher transmission.
  4. F

    Hynix ISPR keynote

    The feature is hexagonally arranged, so can actually be produced with 2 rounds of spacer patterning from a 120 nm x 210 nm starting array (technique already practiced by Samsung for a while). An older immersion tool may suffice.
  5. F

    Hynix ISPR keynote

    It looks they are still evaluating the process; the doses are already very high, much higher than what ASML uses to report throughput.
  6. F

    Low yields driving calls for EUV pellicles

    There were statements to the effect that some chips made by EUV have suffered low yield, due to no pellicles: https://semiengineering.com/euv-pellicles-finally-ready/ ..Samsung and TSMC initially moved into EUV production without pellicles, simply because these components weren’t ready. The...
  7. F

    Intel _does_ read Semiwiki!

    So Intel will no longer call it 7nm? Maybe stop calling it some nm feature size?
  8. F

    Intel to try to become a foundry again?

    A foundry lists its process offerings, I guess we should see one soon from IFS.
  9. F

    Magnachip To Be Acquired By Wise Road Capital

    It sold its foundry services and one of its fabs last year, display drivers are its highlight now.
  10. F

    Magnachip To Be Acquired By Wise Road Capital

    http://www01.koreaherald.com/view.php?ud=20210329001113 200mm
  11. F

    Discussion: Our chips can never achieve the true computing power of a brain by having same specs like it.

    @jaiyam, @Saicharan1919, the spin transfer torque (STT) MRAM can act as memristors: https://www.nature.com/articles/srep31510#:~:text=1b%20(left)%2C%20the%20spin,across%20the%20stripe%2Dshaped%20junction
  12. F

    Discussion: Our chips can never achieve the true computing power of a brain by having same specs like it.

    Relying on analog memory in combination with digital processing seems to be the direction taken by this approach. It may not achieve the brain-like scenario but is more targeted as an alternative to von Neumann architecture.
  13. F

    Discussion: Our chips can never achieve the true computing power of a brain by having same specs like it.

    As SRAM replacement, STT-MRAM has been frequently recommended. It will give better space efficiency, but not sure it can provide power efficiency yet (depends on the thermal stability you need). Actually memory-based computing has been proposed for a while. I guess too many designers still...
  14. F

    Discussion: Our chips can never achieve the true computing power of a brain by having same specs like it.

    That's likely true. There were some CMOS demos but those were definitely very space-inefficient and would not be power-efficient if scaled to brain capacity.
  15. F

    Discussion: Our chips can never achieve the true computing power of a brain by having same specs like it.

    How about Spiking Neural Networks (SNN)? https://en.wikipedia.org/wiki/Spiking_neural_network
  16. F

    I would like to know the approach using by tsmc , samsung , intel for SADP process ?

    The new technique is SALELE (used at TSMC): https://www.linkedin.com/pulse/salele-double-patterning-7nm-5nm-nodes-frederick-chen
  17. F

    Any Thoughts on the Micron Utah fab?

    If not Intel, I can only see a Korean company willing to use the fab as is.
  18. F

    TSMC's Top Customers 2019-2021

    That was indeed very interesting, I also wondered why the Note was being delayed, if the 5nm had something to do with it. If that's the case, the 4nm modems are also in trouble, could be even worse.
  19. F

    TSMC's Top Customers 2019-2021

    I had read Nvidia was still on 8nm, maybe the large die was a bigger risk with EUV. https://itigic.com/why-did-nvidia-rtx-3000-arrive-in-8nm-with-samsung/ Qualcomm is already trying to move beyond 7nm, but it was suspected 5nm (888)/4nm (X65/X62 modems) is with Samsung...
  20. F

    TSMC's Top Customers 2019-2021

    From assumed 14 EUV layers for TSMC 5nm, with Fab 18 3 phases, we might estimate 42 tools (3 x 14). That is about half the installed base, in fact. But we know some 5nm TSMC layers are not single patterning, so there could be more, unless the additional patterning is DUV.
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