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Search results

  1. S

    A Survey of Techniques for Intermittent Computing (from Harvested Energy)

    Intermittent computing (ImC) refers to the scenario where periods of program execution are separated by reboots. This computing paradigm is common in some IoT devices. ImC systems are generally powered by energy-harvesting devices: they start executing a program when the accumulated energy...
  2. S

    Survey paper on hardware accelerators and optimizations for RNNs

    RNNs have shown remarkable effectiveness in several tasks such as music generation, speech recognition and machine translation. RNN computations involve both intra-timestep and inter-timestep dependencies. Due to these features, hardware acceleration of RNNs is more challenging than that of...
  3. S

    Survey paper on Intel's Xeon Phi

    Intel's Xeon Phi (having "many-integrated core" or MIC micro-architecture) combines the parallel processing power of a many-core accelerator with the programming ease of CPUs. In this paper, we survey 100+ works that study the architecture of Phi and use it as an accelerator for a broad range...
  4. S

    Survey paper on Deep Learning on CPUs

    CPU is a powerful, pervasive, and indispensable platform for running deep learning (DL) workloads in systems ranging from mobile to extreme-end servers. We review 140+ papers focused on optimizing DL applications on CPUs. We include the methods proposed for both inference and training and...
  5. S

    A Survey on Reliability of DNN Algorithms and Accelerators

    As DNNs become common in mission-critical applications, ensuring their reliable operation has become crucial. Conventional resilience techniques fail to account for the unique characteristics of DNN algorithms/accelerators, and hence, they are infeasible or ineffective. Our paper...
  6. S

    Survey paper on Deep Learning on GPUs

    The rise of deep-learning (DL) has been fuelled by the improvements in accelerators. GPU continues to remain the most widely used accelerator for DL applications. We present a survey of architecture and system-level techniques for optimizing DL applications on GPUs. We review 75+ techniques...
  7. S

    Survey paper on Micron's Automata Processor

    Sorry, Arthur. I have not idea about the business aspect. Technically, as an academician, I can say that the effectiveness of Automata execution depends a lot on memory technology. If 3D Xpoint can provide larger fan-in/fan-out, then it will be helpful for modeling complex automata which have a...
  8. S

    Survey paper on Micron's Automata Processor

    Micron has stopped developing AP. http://naturalsemi.com and https://engineering.virginia.edu/center-automata-processing-cap are now leading the development of AP.
  9. S

    Survey paper on Micron's Automata Processor

    Problems from a wide variety of application domains can be modeled as ``nondeterministic finite automaton'' (NFA) and hence, efficient execution of NFAs can improve the performance of several key applications. Since traditional architectures, such as CPU and GPU are not inherently suited for...
  10. S

    Survey paper on Intel's Xeon Phi

    Intel’s Xeon Phi combines the parallel processing power of a many-core accelerator with the programming ease of CPUs. We survey ~100 works that study the architecture of Phi and use it as an accelerator for a broad range of applications. We discuss the strengths and limitations of Phi. We...
  11. S

    Survey on Neural Network on NVIDIA's Jetson Platform

    Design of hardware accelerators for neural network (NN) applications involves walking a tight rope amidst the constraints of low-power, high accuracy and throughput. NVIDIA's Jetson is a promising platform for embedded machine learning which seeks to achieve a balance between the above...
  12. S

    Survey on mobile web browsing

    Mobile web browsing (MWB) can very well be termed as the confluence of two major revolutions: mobile (smartphone) and internet revolution. Mobile web traffic has now surpassed the desktop web traffic and has become the primary means for service providers to reach-out to the billions of...
  13. S

    Survey of Spintronic Architectures for Processing-in-Memory and Neural Networks

    Spintronic memories such as STT-RAM (spin transfer torque RAM), SOT-RAM (spin orbit torque RAM) and DWM (domain wall memory) facilitate efficient implementation of PIM (processing-in-memory) approach and NN (neural network) accelerators and offer several advantages over conventional memories...
  14. S

    Survey of Data-Encoding Techniques for Reducing Data-movement Energy

    Data-movement consumes two orders of magnitude higher energy than a floating-point operation and hence, data-movement is becoming the primary bottleneck in scaling the performance of modern processors within the fixed power budget. The accelerators for deep neural networks have huge memory...
  15. S

    Survey on FPGA-based Accelerators for CNNs

    CNNs (convolutional neural networks) have been recently successfully applied for a wide range of cognitive challenges. Given high computational demands of CNNs, custom hardware accelerators are vital for boosting their performance. The high energy-efficiency, computing capabilities and...
  16. S

    Survey on DRAM reliability techniques

    Aggressive process scaling and increasing demands of performance/cost efficiency have exacerbated the incidences and impact of errors in DRAM systems. Due to this, improvements in DRAM reliability has received significant attention in recent years. Our paper surveys techniques for improving...
  17. S

    Survey of ReRAM (memristor) based Designs for Processing-in-memory and Neural Network

    As data movement operations and power-budget become key bottlenecks in processor design, interest in approaches such as processing-in-memory (PIM), machine learning, and especially neural network (NN)-based accelerators has grown significantly. Resistive RAM (ReRAM or memristor) can work as...
  18. S

    Survey paper on dynamic branch predictors

    Branch predictor (BP) is an essential component in modern processors since high BP accuracy can improve performance and reduce energy. However, reducing latency and storage overhead of BP while maintaining high accuracy presents significant challenges. W present a survey of dynamic branch...
  19. S

    Survey paper on security techniques for GPUs

    Graphics processing unit (GPU), although a powerful performance-booster, also has many security vulnerabilities. Due to these, the GPU can act as a safe-haven for stealthy malware and the weakest ‘link’ in the security ‘chain’. We present a survey of techniques for analyzing and improving GPU...
  20. S

    Survey on Techniques for Improving of Non-volatile memories

    Due to their high density and near-zero leakage power consumption, non-volatile memories (NVMs) are promising candidates for designing future memory systems. However, compared to conventional memories, NVMs also face more-severe security threats, e.g., the limited write endurance of NVMs makes...
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