Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?search/49603/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/JobRunner] => 1050070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000670
            [ThemeHouse/XPress] => 1010394
            [XF] => 2011170
            [XFI] => 1030270
        )

    [wordpress] => /var/www/html
)

Search results

  1. F

    5nm wafer cost very high

    Is this electrical yield? Or if not, what defect size is this measured at?
  2. F

    5nm wafer cost very high

    There are many multipatterning possibilities, it looked like TSMC was following a trend of adding one per node: 16nm=>2, 10nm=>3, 7nm=>4, 5nm=>5, ...
  3. F

    5nm wafer cost very high

    The mask count from 10nm to 5nm was comparable according to TSMC (at IEDM 2019). The main point they made was they had expected many more masks at 5nm without EUV. That said, they do have special EUV mask handling in the fab (cleaning) due to lack of pellicles.
  4. F

    5nm wafer cost very high

    The author replied; basically the 76% is a consequence of an alternative expression of their formula, where Line 6/Line 7 is their stated 75.07%. He also will join the forum for further interaction. Looking forward to it!
  5. F

    5nm wafer cost very high

    In Table 9, Line 6 looks like 76% of Line 4, which is Line 2 minus depreciation. However, this was not explained that way by the authors. I have asked CSET for the clarification.
  6. F

    5nm wafer cost very high

    There is no depreciation applied to 5nm, but the fitted capital investment is a discount from actual.
  7. F

    5nm wafer cost very high

    The cost of a 5nm wafer was recently reported: https://www.techspot.com/news/86813-analysts-believe-single-tsmc-5nm-wafer-costs-17000.html#:~:text=According%20to%20CSET's%20model%2C%20a,7nm%20node%20reportedly%20costs%20%249%2C346. The wafer cost had progressively increased from 16 to 7 nm at...
  8. F

    Electron microscope scan comparing Intel 14nm+++ and TSMC 7nm transistors

    It's worth noting that the 7nm Lg is 21 nm while the 14+++ is 24 nm, at around 12:55 mark.
  9. F

    EUV for older nodes?

    For the optimized illumination for 2D line cut (or via) application, the 56 nm case (for 40 nm pitch metal) has a significantly lower pupil fill than the 50 nm case. It's because there are more diffraction order combinations, the ideal would be a smaller fraction of the whole range. Since it is...
  10. F

    China has launched Full Scale AI/Semi War

    https://asia.nikkei.com/Politics/International-relations/US-China-tensions/China-chipmakers-speed-up-effort-to-cut-reliance-on-US-supplies
  11. F

    China has launched Full Scale AI/Semi War

    I did not add to my original post of this link but added later that it was interesting that China was not putting weight behind the market origin anymore. Certainly makes me wonder why.
  12. F

    China has launched Full Scale AI/Semi War

    "South Korean firms are bracing for significant drop in sales. " A large portion of their market affected, apparently. Yet, conflict metals from the Congo (another chip-related political hotbed) haven't received such attention and activity.
  13. F

    Will China Beat US in Chips? Intel going fab-lite?

    In principle, SMIC can use non-US vendors only, eventually, but currently, it still relies on US vendors in etch, PVD and EDA, for example.
  14. F

    China has launched Full Scale AI/Semi War

    It was interesting that they also mentioned doubting the market as the origin.
  15. F

    China has launched Full Scale AI/Semi War

    https://www.globaltimes.cn/content/1196713.shtml
  16. F

    EUV for older nodes?

    I checked the 32 nm - 72 nm line pitches, when considering the illumination angles for best focusing. For the 64 and 72 nm pitches, the illumination for best focusing is positioned a little differently from the tighter pitches; a larger horizontal sine is needed. After 18 degree rotation at the...
  17. F

    Will China Beat US in Chips? Intel going fab-lite?

    Ok, so somehow they got the idea they are delivering capability similar to Intel or TSMC (??).
  18. F

    Intel Tiger Lake (11th generation Core) on 10nm SuperFin process, with Optane compatibility

    Intel piles on the benchmarks to show Tiger Lake is the fastest laptop CPU With AMD's mobile Ryzen 4000 dominating benchmarks, Intel's eager to prove that Tiger Lake is still the notebook processor to beat...
  19. F

    Will China Beat US in Chips? Intel going fab-lite?

    The strange thing here is the multi-billion funding is supposed to be from the government, and it's not enough? Maybe the government has to be more careful going forward.
  20. F

    Will China Beat US in Chips? Intel going fab-lite?

    A little strange to see the administration being selective on research.
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