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    Lithographic Patterning using Tilted Ion Implantation (TII)

    To achieve an aggressive lithographic pitch in advanced process nodes, foundries have employed self-aligned double patterning (SADP), using sidewall spacers as the final masking layer. In the future, another iteration of this method will offer quad patterning, or SAQP. The team at UC-Berkeley...
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    The RISC vs. CISC debate Redux

    I recently came across an interesting technical article, with a current interpretation of the infamous RISC vs. CISC instruction set architecture debate, which has been ingrained in the computer science field for over 25 years. A link to the article is here. The paper provides a good...