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We are running 3nm now with 2nm (20A) due 2024 to 2026 depending on version and company. Samsung has talked about 1.4nm in 2027 based on a Horizontal Nanosheet with more sheets. My projections are 10A around 2029 based on a CFET, with 7A, 5A, and 3A CFETs to follow. Finally around 2037 we get...
Aluminum for what, are you talking Buried Power Rail (BPR) because Al won't survive the temperatures or meet the electromigration requirements. If you are talking Backside Power Delivery that is copper and it is done at the end of the process flow.
It not quite 2x density due to interconnect requirements but it is a big jump. 2D gives a big jump in CPP and therefore cell width, and CFET gives a big jump in cell height by doubling up the transistors and eliminating the horizontal n-p spacing.
My estimate is 1,500 MTx/mm2 in 2037.
Do you have a reference for that demonstrator, I have never heard of that and never heard/seen anyone talk about it and I am very plugged in to that community.
As is CFET and both Intel and TSMC have published on it extensively and both have shown slides with CFET as a post HNS option. Neither has talked about VTFET.
My own, I have been analyzing this path for many years, I have a presentation of over 60 slides that walks through the whole path and has been shared with/reviewed by a select group of experts.
It is nanosheets rotated 90 degrees.
I don't see this as stackable and it isn't a CFET.
It looks to me like the vertical nanosheet would be lithographically defined and that has more variability than the epitaxially defined horizontal nanosheets (HNS).
As I noted above I don't see this as...
Once you make the change from FinFETs to Horizontal Nanosheets (HNS) you open up a scaling path that will carry us for over ten more years of logic scaling. First there will be multiple generations of HNS, then multiple generations of CFET, and eventually 2D material CFETs. We are currently at...
"VTFET main allure is the "free" path to monolithic 3D, which horizontal devices don't have."
How did you come to the conclusion that this is a stackable technology? It's not clear to me that this is stackable and that isn't what the paper discusses as the advantage of this technology.
So what is your position, the problem is China and nothing else matters? What do you think should be worked on?
The other point here is even if you don't think semiconductors matter, TSMC does or they wouldn't have published this statement. I can also tell you I interact with a who's who of...
Of course China as a country uses more electricity than TSMC and their electricity has a high carbon footprint, but per KWh Taiwan is now even worse.
In order to prevent catastrophic climate change real improvement is needed in every country and every industry. This is a site about...
In Taiwan TSMC hardly uses any renewable energy, they primarily use the Taiwan power grid and that has some of the highest carbon emissions in gCO2e/KWh in the world. They do have the Ark power agreement that may be an important improvement but I haven't dug into that enough to know yet...
All the big semiconductor companies are talking about moving to renewable energy, unfortunately a lot of it is green washing. Renewable energy is not the same as carbon free, burning biomass is considered renewable but emits carbon like crazy.
Secondly as reported by Greenpeace:
“Renewable...
Take EUV, even with uptime <90% it was adopted because it was essential for continued scaling. Getting above 90% and ultimately approaching 95% required new/upgraded versions.
This is a longer conversation than I have time for but simply put....
The technology needs outweigh the manufacturing needs and the technology is harder than any other manufacturing processes on the planet. You have incredibly expensive tools that are immature and therefore are down a lot...
