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Search results

  1. Daniel Payne

    Transistor count calculation problem

    Some chip design companies openly state what their total transistor count is, so it's mostly bragging rights, and they often round to the nearest billion transistors for the largest SoC designs. In the early days of ASICs and FPGA designs, the companies would often cite Gate count, where a Gate...
  2. Daniel Payne

    What Samsung’s Return to U.S. Chip Manufacturing Means For the Economy

    Taylor, Texas reminds me of Aloha, Oregon, because Intel's first Oregon fab was placed in the tiny community of Aloha in 1974, for exactly the same reasons, tax incentives.
  3. Daniel Payne

    Is single-die DRAM gone in favor of stacked-die?

    Yes, I'm amazed at the thermal challenges for stacked chips, what an engineering effort to keep these stacked die systems operating reliably.
  4. Daniel Payne

    Is single-die DRAM gone in favor of stacked-die?

    Several companies have announced stacked DRAM chips: https://arxiv.org/abs/1809.08828 https://www.vikingtechnology.com/dram-modules/dram-memory-stacking/ https://www.slashgear.com/samsung-12-layer-3d-tsv-stacks-12-dram-chips-in-the-same-space-as-8-07594321/...
  5. Daniel Payne

    Making Fat Man's Suits Out of Thin Man's Cloth: can leading-edge equipment fabricate trailing-edge die?

    The average cost of a 180nm mask set is $100,000.00, however that same IC layout, but using 40nm masks will cost you $900,000.00. https://anysilicon.com/semiconductor-wafer-mask-costs/ The gate oxide is thinner for 40nm versus 180nm, which then effects the Vt of the transistor. So moving from...
  6. Daniel Payne

    Making Fat Man's Suits Out of Thin Man's Cloth: can leading-edge equipment fabricate trailing-edge die?

    Good point. The DRC rule deck grows by several X as you move down each smaller process node, so that's an interesting question to run a 180nm mask set on a 40nm process. I'm not sure that it would pass the DRC and ERC. Certainly the timing would change, because the smaller nodes have higher...
  7. Daniel Payne

    Making Fat Man's Suits Out of Thin Man's Cloth: can leading-edge equipment fabricate trailing-edge die?

    Each foundry process has a Process Design Kit (PDK) that is unique, and migrating from 180nm to a smaller process node requires engineering work like: functional simulation, logic synthesis using a new cell library, buying and integrating new 3rd party IP blocks, floor planning, standard cell...
  8. Daniel Payne

    Name for dice on a wafer that are intentionally different than the others

    Good eye, the handful of different die are there for testing purposes to make precise measurements about that wafer. On the test die they can more easily and efficiently measure IV curves, junction leakages, ESD breakdown voltages, P vs N channel conductance, resistivity of interconnect, etc.
  9. Daniel Payne

    Statistics on foundry capacity per process node

    Most foundries do not publish details about capacity per process node, because it’s confidential, although there are companies that will gladly sell you a report estimating these numbers.
  10. Daniel Payne

    Statistics on foundry capacity per process node

    Google is your friend: https://epsnews.com/2021/02/10/5-fabs-own-54-of-global-semiconductor-capacity/ https://www.mordorintelligence.com/industry-reports/semiconductor-foundry-market https://www.semi.org/en/news-media-press/semi-press-releases/global-200mm-fab-capacity-record-growth...
  11. Daniel Payne

    HejianSoft in Shanghai Made Progress in Developing Digital Simulator for the IC Design Industry (EDA)

    I was expecting a link to the Hejian web site, but found none in your article. There's a fab named Hejian that has an insecure website, but no mention of EDA software.
  12. Daniel Payne

    Oski Technology, an Expert in Formal Verification, Joins NVIDIA

    Kudos to Oski for a nice exit, and NVIDIA is such a power house company to be part of.
  13. Daniel Payne

    Any way to determine Motorola 68K pricing from the late 80s / early 90s?

    Quick Google search, 68020 was $487.00 at introduction in 1984, while the 68000 at the same time was priced down to just $15.00. https://www.nytimes.com/1984/06/29/business/motorola-s-powerful-new-chip.html
  14. Daniel Payne

    Lam Research to Open New Semiconductor Equipment Manufacturing Facility in Oregon

    Lam Research has a big footprint in Tualatin, they are located just a few blocks from my house, and Sherwood is turning much of its countryside into industrial and residential use. Growth is good for the semi business.
  15. Daniel Payne

    SATA Hard Drive Using Problem

    Uh, Windows XP Pro support ended in 2014, so what are you doing with a 7 year old, discontinued computer operating system? Just curious, of course.
  16. Daniel Payne

    Apple boosting iPhone production?

    The mmWave support of 5G in the iPhone 13 could give you faster data rates, but the antenna needs to be within line of sight, even a tree branch or pane of glass will attenuate the signal, dropping your speeds. https://www.tomsguide.com/news/iphone-13-could-get-a-major-5g-boost-heres-why
  17. Daniel Payne

    NAND Memory Use

    Google is your friend. https://www.xilinx.com/support/answers/65463.html
  18. Daniel Payne

    China's Tsinghua Unigroup says creditors call for restructuring

    With the rapid expansion of semiconductor companies in China, the banks were too willing to extend credit in efforts to expand quicker. Let's see which Chinese venture picks up the pieces of Tsinghua Unigroup.
  19. Daniel Payne

    Dumb question, but why nobody tried to make ICs on already pre-cut dies ?

    Paul, think about Pizza for a moment, why do they bake the entire pizza all at once, instead of 12 individual pieces? Answer: It’s faster, cheaper and offers greater quality control to fabricate an entire 200mm or 300mm wafer at one time, instead of 5,000 times.
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