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Search results

  1. F

    AMD getting comfortable with Samsung 4nm? Samsung's latest 4nm Exynos 2200 was co-designed with AMD. Is AMD using the same playbook as Qualcomm?
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    iPhone 13 A15 Bionic SoC N5P details (from UnitedLex) "Key layout and process features observed include tight diffusion termination (e.g., unique single diffusion break), contact over the active gate (COAG), optimized gate cut after replacement...
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    Over 100 million wafers shipped with EUV multipatterning, >95% claimed by Lam Research

    Lam Research claims over 95% of the more than 100 million wafers processed with multipatterning (193i and EUV), particularly highlighting 5nm logic node.
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    Different estimates of EUV tool allocation at TSMC and Samsung but same trends

    CTEE and Mizuho gave different estimates of EUV tools allocated at TSMC and Samsung but the trends are the same: CTEE: Mizuho: Notably, Intel (part of the "Others") would not be able to...
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    Samsung to develop own EUV pellicle Samsung Electronics is developing its own 'Pellicle', which is considered an essential part of the extreme ultraviolet (EUV) process. It is a strategy to strengthen the competitiveness of the EUV process used for ultra-fine semiconductor manufacturing...
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    Micron's rushed sale of Lehi fab

    Reading this, I got the impression that Micron tried to sell off its Lehi fab very quickly, and TI didn't even take all of it: The 40% in "tools and assets" still yet to be disposed.
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    Gaussian random field EUV stochastic models - 2021 SPIE paper by Siemens Digital Industries (formerly Mentor Graphics EDA)

    Mentor Graphics was acquired by Siemens in 2017. EDA is now part of Siemens Digital Industries. This year, they published a paper for SPIE EUV virtual conference, "Gaussian Random Field EUV stochastic models, their generalizations and lithographically meaningful stochastic metrics."...
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    TSMC to reduce EUV layers for 3nm as part of CIP As part of a Continuous Improvement Plan (CIP), TSMC will target reducing EUV machine use. From 25 EUV layers for 3nm down to 20, for example. Tool cost is one issue. Another is the heavy utility consumption (electric power, water), which is...
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    Samsung to begin using EUV pellicles in 2023 They have their work cut out for them.
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    Intel 10nm+ features presented at IRPS 2020

    At IRPS 2020 (April), Intel revealed the changes made with 10nm+ compared to original 10nm: an 11th metal layer after M10, and denser MIM capacitor. Everything else the same. Gate patterning same as their M0 and M1 oddly enough (SAQP). If you would like a copy, let me know. R. Grover et al., A...
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    Samsung 3nm GAA HVM in 2024?

    Interesting article projecting some 2-3 years before Samsung 3GAE would really take off:
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    Intel, ASML, Samsung, TSMC all thought of this, so it must be...

    The four companies have all thought of using electric fields in the EUV lithography exposure process because the EUV sets off electrons in the resist which can then migrate randomly, causing roughness and resolution loss. An electric field would be an obvious way to keep them moving...
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    ASML Litho tool energy consumption benchmark

    This is from ASML 2020 annual report.
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    Snapdragon 888 overheating At the beginning of December last year, Qualcomm announced the launch of the high-end flagship processor...
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    TSMC makes China's Big Island AI GPGPU chip
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    China aiming to achieve 24 nm pitch SAQP domestic capability China is developing domestic SAQP capability to target 24 nm pitch.
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    China's current memory capability

    It looks like in both DRAM and NAND it is at a level equivalent to "2y" when referred to Samsung, Micron, or SKHynix. TechInsights analyzed a CXMT '2x' (22nm D/R) part which actually looks closer in cell size to a mainstream '2y': SMIC is mass...
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    Snapdragon 888 efficiency and shortage imply 5LPE symptoms

    A recent review of Snapdragon 888 made on Samsung's 5LPE was less than stellar, implying some difficulty compared to TSMC 5nm. Interestingly, Qualcomm went back to TSMC 7nm N7P for its newer Snapdragon 870.
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    Low yields driving calls for EUV pellicles

    There were statements to the effect that some chips made by EUV have suffered low yield, due to no pellicles: ..Samsung and TSMC initially moved into EUV production without pellicles, simply because these components weren’t ready. The...
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    TSMC to open R&D center in Baoshan