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The question of the possibility of quantum computers (QC)
ever being built is unclear Of the very large number of papers
published in the QC area, more are skeptical of the possibility of QCs
being built that are faster than classical computers than pro
QC papers. Some papers depend on...
I thought of an example of need for basic research in
semiconductor area. Circuit simulation is still performed
using ancient Spice. It goes back to the late 1960s and
1970s when solid state physics was an important theoretical
reseach area. It is still always used. Research is needed
The term "digital physics" might not be right. EECS departments
are saying physics is applied physics. For example, Stanford
SLAC is now used exclusively for materials science and biological
experiments. Young theoretical physicists are stuck working
on quantum computers because there is...
I knew William Shockley from taking has Freshman seminar
at Stanford. The book "Crystal Fire: The Invention of the
Transistor and the Birth of the Information Age" by Riordan
M. and Hoddeson, L. tells a very different story of Shockley
Semiconductor. I think the actual Shockley...
Intel's new Alderlake consumer desktop CPUs use more power and little-big core design
to seemingly benchmark faster than AMD chips. I do not understand why increasing
power use for significant executiion speed improvement is not good. Here are some
I am working on an argument that uses normal computer
integer unit type primitives to calculate algorithm complexity
such as unit multiply and the ability to index arrays and bit strings.
It changes complexity results. Wide multiply by table
look up can't be a primitive because the table...
I write the CVC digital Verilog HDL simulator. Main
determinant of simulator value is simulation speed
(can over night regressions for complex chips be
completed overnight?). Verilog simulation is limited
by integer CPU performance. There are other types of
simulation that are limited by...
CPU is not really faster and still seemingly just one instruction per
clock cycle. Improvements except for graphics where parallelism
works is faster memory interface, larger cache and more GPUs. CPU is
faster because of process shrink. When X86_64 CPUs start improving
the same features and...
I think Intel (Wintel?) are responding to AAPL M1 closed system
performance by making Intel's new Alder Lake i5 optimized for
just Windows closed system benchmarks. For my Verilog digital
simulator that is close to a universal machine, the optimizations
especially larger caches optimized for...
I think you are swallowing the AI hype without any skepticism.
Something interesting happened with biotech drug discovery
"compounding" recently. Google claims to have discovered
an AI algorithm to go from sequencing of DNA, RNA
and proteins to the 3 dimension structure of molecules. Claiming...
This not exactly on topic, but I have been having problems with modern
lightweight laptop SSD drives and Linux only system. Symptom is that SSD drive
loses ability to boot. Having a repair shop replace the drive fixes problem.
Strange part is that when the unbootalble drive is plugged into a...
There has been recent advances in algorithms to translate protein
sequences into protein structure. As usual Google is calling its
program Alphafold a great AI success. Reality is that it is just good
application programming using physical theories from molecular bonding
area. Program is...
Good question. Linux port to the Apple M1 is almost finished. That
will allow benchmarking where Apple can't optimize for its OS. So
far compiling Linux kernal on M1 is faster, but that is probably because
M1 has highest memory bandwidth since RAM is on the SOC.
Possibly related to your post. The AMD engineers who
have designed the Zen architecture that hasIPC rates as
good or better than Intel's mostly came from IBM when
it left the hardware market. I think IBM finally exited the
server market in 2014.
I need to think about this, but here is an example. AMD
is advertising 20% faster ZEN CPUs. The change is
using TMSC multi-layer technology to increase cache
size on the chiplet put on top of the CPU because
cache does not use much power. I do not see bigger
cache as computation improvement...
Sorry Nenni but you people should learn some physics. Shrinkage
to save power is a dead end. You should be asking how much shrinkage
improves computing power that I think means faster clock speed for
von Neumann architecture computers.
This is not my area. I worked at LSI Logic back in the early
1980s. Wilf Corrigan and the fab VP from HP had no trouble
getting capital and setting up a leading edge at the time
high yield fab.
LSI Logic sort of failed because of lack of EDA tools so there
were no chip orders to fill the fab...