From their 3nm announcement: https://news.samsung.com/global/sam...-3nm-process-technology-with-gaa-architecture
Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.
So their current (first) version may just be a gate pitch shrink to 45 nm (from 54 nm), while keeping a 36 nm metal pitch from 5nm and same number of tracks. The metal pitch would be reduced in the second step.
Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.
So their current (first) version may just be a gate pitch shrink to 45 nm (from 54 nm), while keeping a 36 nm metal pitch from 5nm and same number of tracks. The metal pitch would be reduced in the second step.