Vinay Shivakumar
I am a VLSI physical design engineer .I have handled several implementations from RTL to GDS.
I have worked in Cadence and Synopsys implementation flows. I have also worked extensively in timing analysis (primetime) and physical verification(Calibre). Currently in AMD i lead the clock implementation work for 2 high performance processor cores.
I have worked in Cadence and Synopsys implementation flows. I have also worked extensively in timing analysis (primetime) and physical verification(Calibre). Currently in AMD i lead the clock implementation work for 2 high performance processor cores.
- Location
- Bengaluru Area, India