Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?members/rstar.17444/recent-content
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021171
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Recent content by Rstar

  1. R

    Airlines warn of 'catastrophic' crisis when new 5G service is deployed

    Wasn't the FCC at the time of this sale run by the "tear it all up" Verizon shill put in by the last guy? Their apporach to everything commercial was to pillage US assets as fast as possible.
  2. R

    Wafer size / fab processing questions

    And don;t forget that wafer sort times are extremely long for a 450mm wafer.
  3. R

    Intel Lacks a Strong Ecosystem

    I would absolutely agree but Intel does have the current trade and political winds at it's back.
  4. R

    No Chip Shortage for Apple!

    Apple doesn't make any chips. They certainly have the resource to pay extra for capacity priority and the clout to minimize that.
  5. R

    Intel "Years Ahead" in Packaging Technologies?

    I'm not positive, but I think Intel already uses TSMC for foveros like parts and HBM with Samsung for emib
  6. R

    Intel "Years Ahead" in Packaging Technologies?

    I don't exactly know the situation since I've been gone for a while, but Intel used tsmc modems and in servers Samsung (probably) memory. With Google, microsoft, and amazon designing their own accelerator chips, someone like tsmc or Samsung is making them. Intel will be able to leverage that...
  7. R

    Intel "Years Ahead" in Packaging Technologies?

    With emib there is only dense (for packaging) routing in the chip to chip interconnect area using coarse patterned Si or glass chiplets embedded in the package. The interconnect chiplets is similar to an interposer, but only the size of the dense io routing.
  8. R

    Intel "Years Ahead" in Packaging Technologies?

    Having invented EmIB for Intel before I retired 5 years ago to cost effectively connect disparate high density IO from different dice on a package I maybe be biased. But I'd say it is a huge packaging cost and complexity advantage when using mixed fab technologies and manufacturers. Foveros is...
  9. R

    Change of CEO at Intel announced

    I'm not so sure Pat's core strength is fab technology, though he is a very sharp guy and will at least bring a technology and product vision to a longtime rudderless ship. Maybe TSMC will bail them out and buy out their fabs? But worse, I'm not so sure he can so easily step back in and right...
Top